Programming Interface Information:
The Monitor Records are intended Programming Interfaces that
allow the customer to write programs to obtain services of z/VM.

MRPRCRCD

Prolog
Control Block Contents
Cross Reference

MRPRCRCD Prolog

 DSECT NAME - PRCRCD
 FUNCTION - Map a Monitor record.
 LOCATED BY -
        Through the Monitor Control Area
 REFERENCED CONTROL BLOCKS -
        MRRECHDR    Monitor Record Header
 NAME - MRPRCRCD
 DESCRIPTIVE NAME - Monitor Sample Record
                    Domain  5 - Processor Domain
                    Record 17 - Real CPU Data (per CPU)
 DESCRIPTION - Provides data related to a real CPU in the partition.
               A separate record is generated for each real CPU.
               When this record is present in monitor data,
               this record and Domain 5 Record 18 should be used
               instead of Domain 5 Record 3. Domain 5 Records 17
               and 18 are intended to replace Domain 5 Record 3.
 
 NOTE: When a field in this record uses the term "CPU/core",
       the meaning of the field changes based on whether
       Multithreading (MT) is enabled for this partition.
       Refer to Monitor Sample Record Domain 1 Record 4
       (MRMTRSYS) to determine whether MT is enabled for
       this partition as well as the number of threads for
       each CPU type.
 
       When MT is not enabled, a physical core contains
       only one CPU:
         - CPU  : central processing unit (processor).
         - CORE : physical unit containing one CPU.
                  In this environment the core has
                  1 thread, the term thread is not used,
                  and the term "CPU" is generally favored
                  over the term "core".
 
       When MT is enabled, a physical core contains one or
       more CPUs (aka "threads"):
         - CPU   : central processing unit (processor).
                  Identified by CPU address which consists
                  of core ID and thread ID.
         - CORE  : physical unit containing one or more CPUs
                  (aka "threads"). All CPUs of a core have
                  the same CPU type.
         - THREAD: synonym for a CPU that is a memeber of a
                   core. Each thread on a core has a
                   distinct thread ID (TID), numbered from
                   0 up to the maximum thread ID available
                   on the core.
 

MRPRCRCD Control Block Contents

Offsets
Dec  Hex  Type        Len  Name (Dim)             Description
 
   0   0  Structure    64+ PRCRCD                 Start of monitor record
   0   0  Character     0  PRCRCD_MRHDR           Record header. See MRRECHDR
                                                  for details.
   0   0  Character    20  MRHDR
   0   0  Unsigned      2  MRHDRLEN
   2   2  Unsigned      2  MRHDRZER
   4   4  Unsigned      1  MRHDRDM
   5   5  Unsigned      1  *
   6   6  Unsigned      2  MRHDRRC
   8   8  Character     8  MRHDRTOD
  16  10  Character     4  *
  20  14  Character     0  MRHDR_END
  20  14  Unsigned      2  PRCRCD_PFXCPUAD        Processor's CPU address
  22  16  Unsigned      2  *                      Reserved for IBM use
  24  18  Unsigned      4  PRCRCD_PFXDSPCS        Count of 'long paths'
                                                  through the dispatcher. This
                                                  is roughly the number of
                                                  times a different user was
                                                  selected to be dispatched. It
                                                  includes also the number of
                                                  times a running user was
                                                  examined to see if it should
                                                  continue to run, and was
                                                  selected to run again (no
                                                  switch made).
  28  1C  Unsigned      4  PRCRCD_PLSDSPCM        Count of times a VMDBK was
                                                  chosen to be dispatched, then
                                                  had to be moved to the master
                                                  processor for master-only
                                                  work. This is the only time
                                                  work will be passed from a
                                                  non-master-processor to
                                                  another processor.
  32  20  Character     8  *                      Reserved for IBM use.
                                                  Previous field is no longer
                                                  meaningful. (PRCRCD_CALUDED)
  40  28  Unsigned      1  PRCRCD_PFXTYPE         Host CPU usage type
                                                  identifier. Processor type is:
                                                  X'14' = Master Processor
                                                  X'1E' = Dedicated Processor
                                                  X'28' = Alternate Processor
                                                  X'32' = Parked Processor
  41  29  Unsigned      1  PRCRCD_PFXCPUTY        CPU type. Valid values:
                                                  X'00' - General Purpose (CP)
                                                  X'02' - zSeries Application
                                                          Assist (zAAP)
                                                  X'03' - Integrated Facility
                                                          for Linux (IFL)
                                                  X'04' - Internal Coupling
                                                          Facility (ICF)
                                                  X'05' - zSeries Integrated
                                                          Information (zIIP)
  42  2A  Unsigned      1  PRCRCD_PFXSTATE        CPU Operating Status. Valid
                                                  values:
                                                  000 x'00' CPU is online and
                                                            available
                                                  022 x'16' Attempting to quiesce
                                                            this CPU so it can be
                                                            taken offline
                                                  044 x'2C' CPU has been quiesced
                                                            and is in disable wait
                                                            state so it can be taken
                                                            offline
                                                  055 x'37' CPU is check-stopped
                                                  066 x'42' CPU is now logically
                                                            offline
                                                  110 x'6E' CPU is physically
                                                            offline
                                                  238 x'EE' CPU is in an unknown
                                                            state (SIGP
                                                            communication failure)
                                                  130 x'82' CPU is being brought
                                                            online
  43  2B  Unsigned      1  PRCRCD_PFXPOLAR        Current polarization of the
                                                  CPU/core. It is one of 4 possible
                                                  values: X'00' - The CPU is
                                                  X'00' - The CPU is horizontally
                                                          polarized
                                                  X'01' - The CPU is vertically
                                                          polarized with low
                                                          entitlement
                                                  X'02' - The CPU is vertically
                                                          polarized with medium
                                                          entitlement
                                                  X'03' - The CPU is vertically
                                                          polarized with high
                                                          entitlement
 
                                                  Note that while z/VM does not
                                                  park horizontally polarized
                                                  CPUs/cores, it is possible to observe
                                                  a parked horizontal CPU/core. This
                                                  can occur during the transition
                                                  between vertical and horizontal
                                                  polarization. Shortly following
                                                  this transition, z/VM will
                                                  unpark any parked horizontal
                                                  CPUs/cores.
  44  2C  Unsigned      4  PRCRCD_CALENTMT        For vertical CPUs/cores
                                                  (PRCRCD_PFXPOLAR <> X'00'),
                                                  this is a scaled number
                                                  between X'00000000' and
                                                  X'00010000' representing the
                                                  portion of a physical CPU/core to
                                                  which this vertical CPU/core is
                                                  entitled. This value is
                                                  X'00000000' for a horizontal
                                                  CPU/core.
                                                  When MT is enabled, this core
                                                  value is repeated in the monitor
                                                  record of each CPU in the core.
                                                  These values are not to be added
                                                  up across the core.
  48  30  Unsigned      2  PRCRCD_RCCTOPDI        DSVBK index for CPU.
                                                  If processor is not a member
                                                  of any active Dispatch Vector
                                                  Block, it contains all ones.
  50  32  Unsigned      1  PRCRCD_MAXTOPO         Maximum number of
                                                  topology levels currently
                                                  architected.
                                                  This value defines upper
                                                  boundary of a dimension of
                                                  the PRCRCD_PLSSTLTL array.
  51  33  Unsigned      1  PRCRCD_SIZTOPDS        This value defines the
                                                  size (in bytes) of the
                                                  PRCRCD_RCCTOPDS field.
  52  34  Unsigned      2  PRCRCD_OFFTOPDS        Offset within this record
                                                  to the beginning of the
                                                  PRCRCD_RCCTOPDS field.
  54  36  Unsigned      2  PRCRCD_OFFSTLTL        Offset within this record
                                                  to the beginning of the
                                                  PRCRCD_PLSSTLTL array.
  56  38  Unsigned      1  PRCRCD_CALMNEST        When the configuration-
                                                  topology facility is installed,
                                                  this is the selector 2 (x) value
                                                  used by CP on the STSI 15.1.x to
                                                  obtain CPU topology information.
                                                  When the configuration-topology
                                                  facility is not installed, this
                                                  contains a value of 1.
 
                                                  This value is used to determine
                                                  the number of valid entries
                                                  in the PRCRCD_PLSSTLTL array.
  57  39  Character     3  *                      Reserved for IBM use.
  60  3C  Unsigned      4  PRCRCD_PLSTSEAR        Count of times a time
                                                  slice ended early because the
                                                  guest loaded a wait state
                                                  within the TSEARLY threshold
  64  40  Character     0  *                      Additional fields may be
                                                  inserted before here. Use
                                                  offsets to locate any fields
                                                  after this point.
   0   0  Bit          32  PRCRCD_RCCTOPDS        This topology descriptor
                                                  or identifier consists of
                                                  the container IDs for each
                                                  level of the topology tree
                                                  above the dispatch vector
                                                  specified in PRCRCD_RCCTOPDI.
                                                  These container IDs are
                                                  positioned left to right with
                                                  the highest nesting level
                                                  listed first.
                                                  When MT is enabled, this value
                                                  is given for each thread (CPU)
                                                  in the core and indicates which
                                                  dispatch vector each CPU is
                                                  drawing work from.
   0   0  Unsigned      4  PRCRCD_PLSSTLTL(0:MAXTOPO) Array of counters
                                                  indicating how many times this
                                                  CPU stole a VMDBK across
                                                  different topology levels.
                                                  Entry 0:Count of times this CPU
                                                          stole a VMDBK from a
                                                          DSVBK that is in an
                                                          equivalent nesting level
                                                          1 (NL1) topology location.
                                                  Entry 1:Count of times this CPU
                                                          stole a VMDBK from a DSVBK
                                                          in a different nesting level
                                                          1 (NL1) topology location
                                                          but the same NL2 location.
                                                  Entry 2:Count of times this CPU
                                                          stole a VMDBK from a DSVBK
                                                          in a different nesting level
                                                          2 (NL2) topology location
                                                          but the same NL3 location.
                                                  Entry 3:Count of times this CPU
                                                          stole a VMDBK from a DSVBK
                                                          in a different nesting level
                                                          3 (NL3) topology location
                                                          but the same NL4 location.
                                                  Entry 4:Count of times this CPU
                                                          stole a VMDBK from a DSVBK
                                                          in a different nesting level
                                                          4 (NL4) topology location
                                                          but the same NL5 location.
                                                  Entry 5:Count of times this CPU
                                                          stole a VMDBK from a DSVBK
                                                          in a different nesting level
                                                          5 (NL5) topology location.
                                                  PRCRCD_OFFSTLTL should be used
                                                  to locate the start of this
                                                  array.
 
                                                  Only the first PRCRCD_CALMNEST
                                                  entries contain valid data.
   *   *  Character     0  PRCRCD_END

MRPRCRCD Cross Reference

                      Hex           Hex
Name                  Offset Length Value
 
MRHDR                      0     20
MRHDR_END                 14      0
MRHDRDM                    4      1
MRHDRLEN                   0      2
MRHDRRC                    6      2
MRHDRTOD                   8      8
MRHDRZER                   2      2
PRCRCD                     0     64+
PRCRCD_CALENTMT           2C      4
PRCRCD_CALMNEST           38      1
PRCRCD_END                 *      *
PRCRCD_MAXTOPO            32      1
PRCRCD_MRHDR               0      0
PRCRCD_OFFSTLTL           36      2
PRCRCD_OFFTOPDS           34      2
PRCRCD_PFXCPUAD           14      2
PRCRCD_PFXCPUTY           29      1
PRCRCD_PFXDSPCS           18      4
PRCRCD_PFXPOLAR           2B      1
PRCRCD_PFXSTATE           2A      1
PRCRCD_PFXTYPE            28      1
PRCRCD_PLSDSPCM           1C      4
PRCRCD_PLSSTLTL            0      *
PRCRCD_PLSTSEAR           3C      4
PRCRCD_RCCTOPDI           30      2
PRCRCD_RCCTOPDS            0      *
PRCRCD_SIZTOPDS           33      1
This information is
based on z/VM V7R2.0.

Last updated on 09 August 2020 at 14:47:15.
Copyright IBM Corporation, 1990, 2020