Programming Interface Information:
The Monitor Records are intended Programming Interfaces that allow the customer to write programs to obtain services of z/VM. |
MRSYTSYG
PrologControl Block Contents
Cross Reference
MRSYTSYG Prolog
DSECT NAME - SYTSYG FUNCTION - Map a Monitor record. LOCATED BY - Through the Monitor Control Area REFERENCED CONTROL BLOCKS - MRRECHDR Monitor Record Header NAME - MRSYTSYG DESCRIPTIVE NAME - Monitor Sample Record Domain 0 - System Domain Record 19- System Data (Global) DESCRIPTION - System wide utilization data. NOTE: -- For additional information about the format and meaning of the SYTSYG_SSIxxxxx fields, refer to - Principles of Operation for the layout of the STSI output (SYSIB 1.2.2 and 2.2.2) which is documented in Chapter 10 under "STORE SYSTEM INFORMATION". -- When a field in this record uses the term "CPU/core", the meaning of the field changes based on whether Multithreading (MT) is enabled for this partition. Refer to Monitor Sample Record Domain 1 Record 4 (MRMTRSYS) to determine whether MT is enabled for this partition as well as the number of threads for each CPU type. When MT is not enabled, a physical core contains only one CPU: - CPU : central processing unit. - CORE : physical unit containing one CPU. In this environment the core has 1 thread, the term "thread" is not used, and the term "CPU" is generally favored over the term "core". When MT is enabled, a physical core contains one or more CPUs (aka "threads"): - CPU : central processing unit. Identified by CPU address which consists of core ID and thread ID. - CORE : physical unit containing one or more CPUs (aka "threads"). All CPUs of a core have the same CPU type. - THREAD: synonym for a CPU that is a member of a core. Each thread on a core has a distinct thread ID (TID), numbered from 0 up to the maximum thread ID available on the core.
MRSYTSYG Control Block Contents
Offsets Dec Hex Type Len Name (Dim) Description 0 0 Structure 164 SYTSYG Start of monitor record 0 0 Character 0 SYTSYG_MRHDR Record header. See MRRECHDR for details. 0 0 Character 20 MRHDR 0 0 Unsigned 2 MRHDRLEN record length in bytes 2 2 Unsigned 2 MRHDRZER field of zeros 4 4 Unsigned 1 MRHDRDM domain identifier 5 5 Unsigned 1 * 6 6 Unsigned 2 MRHDRRC record identifier 8 8 Character 8 MRHDRTOD Time at which this record was built. In time-of-day (TOD) clock format. See IBM System 370 XA Principle of Operation for explanation of format. 16 10 Character 4 * 20 14 Character 0 MRHDR_END End of header 20 14 Character 8 SYTSYG_XCTMSACT Accumulated elapsed time in microseconds that routines that comprise user exits were active 28 1C Unsigned 4 SYTSYG_FTRDONE Number of times fast CCW translation processing completed successfully for a DASD device. 32 20 Unsigned 4 SYTSYG_FTRABORT Number of times fast CCW translation processing was aborted for a DASD device. 36 24 Unsigned 4 SYTSYG_FTRNOTEL Number of times a presented CCW for a DASD device was not eligible for fast CCW translation. There are cases where ineligibility may have been determined before the CCW was presented to the fast path simulator. Those cases are not counted here. 40 28 Unsigned 4 SYTSYG_FTRWRITE Number of times a write channel program for a DASD device was presented for fast CCW translation. 44 2C Unsigned 4 SYTSYG_CTNDONE Number of times fast CCW translation processing completed successfully for a network device. 48 30 Unsigned 4 SYTSYG_CTNABORT Number of times fast CCW translation processing was aborted for a network device. 52 34 Unsigned 4 SYTSYG_CTNNOTEL Number of times a presented CCW for a network device was not eligible for fast CCW translation. There are cases where ineligibility may have been determined before the CCW was presented to the fast path simulator. Those cases are not counted here. ***********************
STSI 1.2.2 fields
Offsets Dec Hex Type Len Name (Dim) Description 56 38 Unsigned 4 SYTSYG_SCPCAPAB STSI 1.2.2 field. The capability of a specialty CPU/core in the configuration in integer format. Used as an indication of the capability of the CPU/core relative to the capability of other processor models. When zero, all CPUs of any CPU type in the configuration have the same capability, as specified by the CPU capability, SYTSYG_CPUCAPAB. 60 3C Unsigned 4 SYTSYG_CPUCAPAB STSI 1.2.2 field. Specifies the capability of a general CPU/core in the current configuration in integer format. Used as an indication of the capability of the CPU/core relative to the capability of other processor models. 64 40 Unsigned 2 SYTSYG_CPUCOUNT STSI 1.2.2 field. The total number of general CPUs/cores in the configuration. Includes all CPUs/cores in the configured, standby and reserved states. 66 42 Unsigned 2 SYTSYG_CPUCFGCT STSI 1.2.2 field. Specifies the number of general CPUs/cores in the configured state. A CPU is in the configured state when it is in the configuration and available to be used to execute programs. 68 44 Unsigned 2 SYTSYG_CPUSTNBY STSI 1.2.2 field. Specifies the number of general CPUs/cores in the standby state. A CPU/core is in the standby state when it is in the configuration, is not available to be used to execute programs, and can be made available by issuing instructions to place it into the configured state. 70 46 Unsigned 2 SYTSYG_CPURESVD STSI 1.2.2 field. Specifies the number of general CPUs/cores in the reserved state. A CPU/core is in the reserved state when it is in the configuration, is not available to be used to execute programs, and cannot be made available by issuing instructions to place it into the configured state. ***********************
STSI 3.2.2 fields This information is level-3 from a VMDBK if available.
Offsets Dec Hex Type Len Name (Dim) Description 72 48 Unsigned 1 SYTSYG_VL3DBCT STSI 3.2.2 field. Specifies the number of VM levels running between the level at which this data was collected and the hardware. For example, data collected from a VM system running second level would show a value of 1. A third level system would show a value of 2. 73 49 Character 1 * Reserved and available for IBM use. 74 4A Unsigned 2 SYTSYG_VL3COUNT STSI 3.2.2 field. The total number of primary virtual CPUs that are provided for this level-3 configuration. Includes all of the virtual CPUs that are in the configured, standby, or the reserved states. 76 4C Unsigned 2 SYTSYG_VL3CFGCT STSI 3.2.2 field. Specifies the number of primary virtual CPUs for this level-3 configuration that are in the configured state. A virtual CPU is in the configured state when it is in the level-3 configuration and available to abe used to execute programs. 78 4E Unsigned 2 SYTSYG_VL3STNBY STSI 3.2.2 field. Specifies the number of primary virtual CPUs for this level-3 configuration that are in the standby state. A virtual CPU is in the standby state when it is in the level-3 configuration, is not available to be used to execute programs, and can be made available by issuing instructions to place it into the configured state. 80 50 Unsigned 2 SYTSYG_VL3RESVD STSI 3.2.2 field. Specifies the number of primary virtual CPUs for this level-3 configuration that are in the reserved state. A virtual CPU is in the reserved state when it is in the level-3 configuration, is not available to be used to execute programs, and cannot be made available by issuing instructions to place it into the configured state. 82 52 Character 2 * Reserved and available for IBM use. 84 54 Character 8 SYTSYG_VL3MNAME STSI 3.2.2 field. Specifies the name of this level-3 configuration. 92 5C Unsigned 4 SYTSYG_VL3CAF STSI 3.2.2 field. The Capability Adjustment Factor specifies the amount of the underlying level-1, level-2 or level-3 configuration capability that is allowed to be used for this level-3 configuration by the virtual machine control program. The maximum value is 1000, and the fraction of level-3 configuration capability is determined by dividing the CAF value by 1000. 96 60 Character 16 SYTSYG_VL3CPNAM STSI 3.2.2 field. Identifies the virtual machine control program that provides this level-3 configuration. This may include qualifiers such as version number and release level. 112 70 Unsigned 4 SYTSYG_MAI_MISS Count of Missing Adapter Interruptions 116 74 Unsigned 4 SYTSYG_MAI_UREC Count of unrecoverable Adapter Interruptions 120 78 Unsigned 4 SYTSYG_NCPCAPAB STSI 1.2.2 field. The nominal capability of a general CPU/core in the configuration in integer format. When zero, this means the system is not operating at reduced speed, so the primary capability, SYTSYG_CPUCAPAB, value applies. 124 7C Unsigned 4 SYTSYG_FXRDONE Number of times zHPF DCW translation processing completed successfully for a DASD device. 128 80 Unsigned 4 SYTSYG_FXRWRITE Number of times a write channel program for a DASD device was presented for zHPF DCW translation. 132 84 Unsigned 4 SYTSYG_RCCSCAPF STSI 1.2.2 field. The capability of a specialty CPU/core in the configuration in binary floating point (BFP) format. Used as an indication of the capability of the CPU/core relative to the capability of other processor models. When zero, all CPUs of any CPU type in the configuration have the same capability, as specified by the CPU capability, SYTSYG_RCCCCAPF. 136 88 Unsigned 4 SYTSYG_RCCCCAPF STSI 1.2.2 field. Specifies the capability of a general CPU/core in the current configuration in BFP format. Used as an indication of the capability of the CPU/core relative to the capability of other processor models. 140 8C Unsigned 4 SYTSYG_RCCNCAPF STSI 1.2.2 field. The nominal capability of a general CPU/core in the configuration in BFP format. When zero, this means the system is not operating at reduced speed, so the primary capability, SYTSYG_RCCCCAPF, value applies. 144 90 Unsigned 4 SYTSYG_SSI1PCPS STSI 1.2.2 field. General CPU/core speed, in approximate CPU cycles per microsecond. 148 94 Unsigned 4 SYTSYG_SSI1SCPS STSI 1.2.2 field. Specialty CPU/core speed, in approximate CPU cycles per microsecond. ***************************** ***************************** *** End of additional STSI 1.2.2 fields ***************************** ***************************** *** 152 98 Bitstring 1 SYTSYG_CALFLG1 Miscellaneous flags 1... .... SYTSYG_PFXSHLAV 1 => CPPROTECT avbl .1.. .... * ..1. .... * ...1 .... * .... 1... * .... .1.. * .... ..1. * .... ...1 * 153 99 Bitstring 1 SYTSYG_RCCSHELD CPPROTECT bits 1... .... SYTSYG_RCCSHLDF 0=MODE2 DFLT OFF 1=MODE2 DFLT ON .1.. .... * ..1. .... * ...1 .... * .... 1... * .... .1.. * .... ..1. * .... ...1 * 154 9A Bitstring 1 SYTSYG_RCCSHLPC CPPROTECT bits 1... .... SYTSYG_RCCSHLR1 MODE1 rqstd .1.. .... SYTSYG_RCCSHLR2 MODE2 rqstd ..1. .... * ...1 .... * .... 1... SYTSYG_RCCSHLA1 MODE1 active .... .1.. SYTSYG_RCCSHLA2 MODE2 active .... ..1. * .... ...1 * 155 9B Bitstring 1 SYTSYG_RCCSHLHC CPPROTECT bits 1... .... SYTSYG_RCCSHLC1 MODE1 capable .1.. .... SYTSYG_RCCSHLC2 MODE2 capable ..1. .... * ...1 .... * .... 1... SYTSYG_RCCSHLI1 MODE1 inherent .... .1.. SYTSYG_RCCSHLI2 MODE2 inherent .... ..1. * .... ...1 * 156 9C Character 4 * Reserved for IBM use 160 A0 Character 4 * Reserved for IBM use 164 A4 Character 0 SYTSYG_END
MRSYTSYG Cross Reference
Hex Hex Name Offset Length Value MRHDR 0 20 MRHDR_END 14 0 MRHDRDM 4 1 MRHDRLEN 0 2 MRHDRRC 6 2 MRHDRTOD 8 8 MRHDRZER 2 2 SYTSYG 0 164 SYTSYG_CALFLG1 98 1 SYTSYG_CPUCAPAB 3C 4 SYTSYG_CPUCFGCT 42 2 SYTSYG_CPUCOUNT 40 2 SYTSYG_CPURESVD 46 2 SYTSYG_CPUSTNBY 44 2 SYTSYG_CTNABORT 30 4 SYTSYG_CTNDONE 2C 4 SYTSYG_CTNNOTEL 34 4 SYTSYG_END 98 0 SYTSYG_FTRABORT 20 4 SYTSYG_FTRDONE 1C 4 SYTSYG_FTRNOTEL 24 4 SYTSYG_FTRWRITE 28 4 SYTSYG_FXRDONE 7C 4 SYTSYG_FXRWRITE 80 4 SYTSYG_MAI_MISS 70 4 SYTSYG_MAI_UREC 74 4 SYTSYG_MRHDR 0 0 SYTSYG_NCPCAPAB 78 4 SYTSYG_PFXSHLAV 98 80 SYTSYG_RCCCCAPF 88 4 SYTSYG_RCCNCAPF 8C 4 SYTSYG_RCCSCAPF 84 4 SYTSYG_RCCSHELD 99 1 SYTSYG_RCCSHLA1 9A 08 SYTSYG_RCCSHLA2 9A 04 SYTSYG_RCCSHLC1 9B 80 SYTSYG_RCCSHLC2 9B 40 SYTSYG_RCCSHLDF 99 80 SYTSYG_RCCSHLHC 9B SYTSYG_RCCSHLI1 9B 08 SYTSYG_RCCSHLI2 9B 04 SYTSYG_RCCSHLPC 9A 1 SYTSYG_RCCSHLR1 9A 80 SYTSYG_RCCSHLR2 9A 40 SYTSYG_SCPCAPAB 38 4 SYTSYG_SSI1PCPS 90 4 SYTSYG_SSI1SCPS 94 4 SYTSYG_VL3CAF 5C 4 SYTSYG_VL3CFGCT 4C 2 SYTSYG_VL3COUNT 4A 2 SYTSYG_VL3CPNAM 60 16 SYTSYG_VL3DBCT 48 1 SYTSYG_VL3MNAME 54 8 SYTSYG_VL3RESVD 50 2 SYTSYG_VL3STNBY 4E 2 SYTSYG_XCTMSACT 14 8
This information is based on z/VM V6R4.0.
Last updated on 24 April 2018 at 17:31:00.
Copyright IBM Corporation, 1990, 2018