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Programming Interface Information:
The Monitor Records are intended Programming Interfaces that allow the customer to write programs to obtain services of z/VM. |
MRSYTCUG
PrologControl Block Contents
Cross Reference
MRSYTCUG Prolog
DSECT NAME - SYTCUG
FUNCTION - Map a Monitor record.
LOCATED BY -
Through the Monitor Control Area
REFERENCED CONTROL BLOCKS -
MRRECHDR Monitor Record Header
NAME - MRSYTCUG
DESCRIPTIVE NAME - Monitor Sample Record
Domain 0 - System Domain
Record 15 - Logical CPU Utilization Data (Global)
DESCRIPTION - Global description of logical "CPU/core"
utilization in a LPAR environment. This
record contains only data pertaining to the
system overall and exists only when the
system is running under control of the
PR/SM feature. For descriptions of individual
logical partitions and their logical
CPUs/cores, see the MRSYTCUP (Domain 0,
Record 16) record.
NOTE: When a field in this record uses the term "CPU/core",
the meaning of the field changes based on whether
Multithreading (MT) is enabled for this partition.
Refer to Monitor Sample Record Domain 1 Record 4
(MRMTRSYS) to determine whether MT is enabled for
this partition as well as the number of threads for
each CPU type.
When MT is not enabled a physical core contains
only one CPU:
- CPU : central processing unit (processor).
- CORE : physical unit containing one CPU.
In this environment the core has
1 thread, the term "thread" is not used,
and the term "CPU" is generally favored
over the term "core".
When MT is enabled, a physical core contains one or
more CPUs (aka "threads"):
- CPU : central processing unit (processor).
Identified by CPU address which consists
of core ID and thread ID.
- CORE : physical unit containing one or more CPUs
(aka "threads"). All CPUs of a core have
the same CPU type.
- THREAD: synonym for a CPU that is a member of a
core. Each thread on a core has a
distinct thread ID (TID), numbered from
0 up to the maximum thread ID available
on the core.
For additional information about the format and
meaning of the SYTCUG_SSI2xxxx fields, refer to
z/Architecture Principles of Operation for the layout
of the STSI output (SYSIB 2.2.2), which is documented
in Chapter 10 under "STORE SYSTEM INFORMATION".
MRSYTCUG Control Block Contents
Offsets Dec Hex Type Len Name (Dim) Description 0 0 Structure 76 SYTCUG Start of monitor record 0 0 Character 0 SYTCUG_MRHDR Record header 0 0 Character 20 MRHDR 0 0 Unsigned 2 MRHDRLEN 2 2 Unsigned 2 MRHDRZER 4 4 Unsigned 1 MRHDRDM 5 5 Unsigned 1 * 6 6 Unsigned 2 MRHDRRC 8 8 Character 8 MRHDRTOD 16 10 Character 4 * 20 14 Character 0 MRHDR_END 20 14 Unsigned 1 SYTCUG_LCUTNPAR Number of defined logical partitions. Each logical partition is described in a separate record, MRSYTCUP (Domain 0, Record 16). 21 15 Bitstring 1 SYTCUG_LCUTFLAG Flag byte 1... .... SYTCUG_LCUTPHYS LPAR management time facility is available on this system. Physical CPU/core utilization data is provided in MRSYTCUM (Domain 0, Record 17). .1.. .... SYTCUG_LCUT204A Indicates enhanced LPAR monitor support available. The enhanced LPAR monitor support allows for reporting of large number of logical CPUs/cores and for the CPU/core type reported in the SYTCUP_LCPTYPE field of the MRSYTCUP record (D0/R16). ..1. .... SYTCUG_LCUT204S Indicates the storage page(s) required to obtain the enhanced LPAR statistics was unavailable for this interval. The number of pages required is based on the number of LPARs and logical CPUs/cores on the system. These pages must be contiguous. This indicates that data may not be reported for all logical CPUs/ cores. ...1 .... SYTCUG_LCUT204E Indicates enhanced LPAR monitor support available as described for SYTCUG_LCUT204A with the addition of support for secondary CPUs/cores such as zIIPs, zAAPS, IFLs, and ICFs. .... 1... * .... .1.. SYTCUG_CALBUSY Indicates a busy condition was encountered when attempting to acquire current CPU utilization data. To avoid delays, reported data uses cached values that were obtained at the time indicated in SYTCUG_LCUTCTOD. .... ..1. * .... ...1 * 22 16 Character 2 * Reserved for IBM use 24 18 Unsigned 2 SYTCUG_LCUTSLCE Global time slice, in milliseconds, if defined by operator. Otherwise, zero. 26 1A Unsigned 2 SYTCUG_LCUTPCCT Number of CPUs/cores in the physical system, or in the physical partition if the system is running in physically partitioned mode. Includes secondary CPUs/cores if SYTCUG_LCUT204E is on ***********************
STSI 2.2.2 fields
Offsets Dec Hex Type Len Name (Dim) Description 28 1C Unsigned 2 SYTCUG_LPNUMBER LPAR Number of the level-2 configuration. This number is unique to this configuration from all other level-2 configurations provided by the same LPAR hypervisor. 30 1E Character 1 * Reserved and available for IBM use. 31 1F Bitstring 1 SYTCUG_CPUCHAR Describes the characteristics of the logical CPUs/cores that are provided for the level-2 configuration. 32 20 Unsigned 2 SYTCUG_CPUCOUNT Specifies the total number of logical CPUs/cores that are provided for this level-2 configuration. This number includes all of the logical CPUs/cores that are in the configured state, the standby state, or the reserved state. Count does not include any secondary CPUs/cores. 34 22 Unsigned 2 SYTCUG_CPUCFGCT Specifies the number of logical CPUs/cores for this level-2 configuration that are in the configured state. Count does not include any secondary CPUs/cores. 36 24 Unsigned 2 SYTCUG_CPUSTNBY Specifies the number of logical CPUs/cores for this level-2 configuration that are in the standby state. A logical CPU/core is in the standby state when it is in level-2 configuration, is not available to be used to execute programs, and can be made available by issuing instructions to place it into the configured state. Count does not include any secondary CPUs/cores. 38 26 Unsigned 2 SYTCUG_CPURESVD Specifies the number of logical CPUs/cores for this level-2 configuration that are in the reserved state. A logical CPU/core is in the reserved state when it is in the level-2 configuration, is not available to be used to execute programs, and cannot be made available by issuing instructions to place it into the configured state. Count does not include any secondary CPUs/cores. 40 28 Character 8 SYTCUG_LPARNAME Specifies the name of this level-2 configuration. 48 30 Unsigned 4 SYTCUG_LPARCAF The LPAR Capability Adjustment Factor specifies the amount of the underlying level-1 configuration capability that is allowed to be used for this level-2 configuration by the LPAR hypervisor. The maximum value is 1000, and the fraction of level-1 configuration capability is determined by dividing the CAF value by 1000. 52 34 Unsigned 2 SYTCUG_CPUDEDCT Specifies the number of configured-state logical CPUs/cores for this level-2 configuration that are provided using dedicated level-1 CPUs/cores. Count does not include any secondary CPUs/cores. 54 36 Unsigned 2 SYTCUG_CPUSHARD Specifies the number of configured-state logical CPUs/cores for this level-2 configuration that are provided using shared level-1 CPUs/cores. Count does not include any secondary CPUs/cores. 56 38 Bitstring 1 SYTCUG_SSI2MTIF Multithreading configuration 1... .... SYTCUG_SSI2MTFI Bit 0 = 0 MT facility not installed in the partition. Remainder of this field, field SYTCUG_SSI2MTGF and field SYTCUG_SSI2MTID are not meaningful (stored as zeros). Bit 0 = 1 MT facility installed .1.. .... * ..1. .... * ...1 .... SYTCUG_SSI2HTSC Bits 3-7 = Maximum supported TID on any core (range 1-31, indicating 2-32 threads/core). Valid only if SYTCUG_SSI2MTFI=1 .... 1... SYTCUG_SSI2HTSC Bits 3-7 = Maximum supported TID on any core (range 1-31, indicating 2-32 threads/core). Valid only if SYTCUG_SSI2MTFI=1 .... .1.. SYTCUG_SSI2HTSC Bits 3-7 = Maximum supported TID on any core (range 1-31, indicating 2-32 threads/core). Valid only if SYTCUG_SSI2MTFI=1 .... ..1. SYTCUG_SSI2HTSC Bits 3-7 = Maximum supported TID on any core (range 1-31, indicating 2-32 threads/core). Valid only if SYTCUG_SSI2MTFI=1 .... ...1 SYTCUG_SSI2HTSC Bits 3-7 = Maximum supported TID on any core (range 1-31, indicating 2-32 threads/core). Valid only if SYTCUG_SSI2MTFI=1 57 39 Bitstring 1 SYTCUG_SSI2MTGF Multithreading general proc- essor configuration 1... .... * .1.. .... * ..1. .... * ...1 .... SYTCUG_SSI2HTGC Bits 3-7 = Maximum supported TID on core comprising general CPUs (range 0-31, indicating 1-32 threads/core). Value will be less than or equal to SYTCUG_SSI2HTSC. Valid only if SYTCUG_SSI2MTFI=1 .... 1... SYTCUG_SSI2HTGC Bits 3-7 = Maximum supported TID on core comprising general CPUs (range 0-31, indicating 1-32 threads/core). Value will be less than or equal to SYTCUG_SSI2HTSC. Valid only if SYTCUG_SSI2MTFI=1 .... .1.. SYTCUG_SSI2HTGC Bits 3-7 = Maximum supported TID on core comprising general CPUs (range 0-31, indicating 1-32 threads/core). Value will be less than or equal to SYTCUG_SSI2HTSC. Valid only if SYTCUG_SSI2MTFI=1 .... ..1. SYTCUG_SSI2HTGC Bits 3-7 = Maximum supported TID on core comprising general CPUs (range 0-31, indicating 1-32 threads/core). Value will be less than or equal to SYTCUG_SSI2HTSC. Valid only if SYTCUG_SSI2MTFI=1 .... ...1 SYTCUG_SSI2HTGC Bits 3-7 = Maximum supported TID on core comprising general CPUs (range 0-31, indicating 1-32 threads/core). Value will be less than or equal to SYTCUG_SSI2HTSC. Valid only if SYTCUG_SSI2MTFI=1 58 3A Bitstring 1 SYTCUG_SSI2MTID Multithreading maximum TID 1... .... * .1.. .... * ..1. .... * ...1 .... SYTCUG_SSI2PSMT Bits 3-7 = Program specified maximum TID (range 0-31, indicating 1-32 threads/core): effective MAX_THREADS value, based on the MAX_THREADS setting in the system configuration file. Valid only if SYTCUG_SSI2MTFI=1 .... 1... SYTCUG_SSI2PSMT Bits 3-7 = Program specified maximum TID (range 0-31, indicating 1-32 threads/core): effective MAX_THREADS value, based on the MAX_THREADS setting in the system configuration file. Valid only if SYTCUG_SSI2MTFI=1 .... .1.. SYTCUG_SSI2PSMT Bits 3-7 = Program specified maximum TID (range 0-31, indicating 1-32 threads/core): effective MAX_THREADS value, based on the MAX_THREADS setting in the system configuration file. Valid only if SYTCUG_SSI2MTFI=1 .... ..1. SYTCUG_SSI2PSMT Bits 3-7 = Program specified maximum TID (range 0-31, indicating 1-32 threads/core): effective MAX_THREADS value, based on the MAX_THREADS setting in the system configuration file. Valid only if SYTCUG_SSI2MTFI=1 .... ...1 SYTCUG_SSI2PSMT Bits 3-7 = Program specified maximum TID (range 0-31, indicating 1-32 threads/core): effective MAX_THREADS value, based on the MAX_THREADS setting in the system configuration file. Valid only if SYTCUG_SSI2MTFI=1 59 3B Character 1 * Reserved for IBM use 60 3C Character 8 * Reserved for IBM use 68 44 Character 8 SYTCUG_LCUTCTOD Time-of-day, in TOD clock format, that the physical CPU/core information was fetched. 76 4C Character 0 SYTCUG_END
MRSYTCUG Cross Reference
Hex Hex
Name Offset Length Value
MRHDR 0 20
MRHDR_END 14 0
MRHDRDM 4 1
MRHDRLEN 0 2
MRHDRRC 6 2
MRHDRTOD 8 8
MRHDRZER 2 2
SYTCUG 0 76
SYTCUG_CALBUSY 15 04
SYTCUG_CPUCFGCT 22 2
SYTCUG_CPUCHAR 1F 1
SYTCUG_CPUCOUNT 20 2
SYTCUG_CPUDEDCT 34 2
SYTCUG_CPURESVD 26 2
SYTCUG_CPUSHARD 36 2
SYTCUG_CPUSTNBY 24 2
SYTCUG_END 4C 0
SYTCUG_LCUTCTOD 44 8
SYTCUG_LCUTFLAG 15 1
SYTCUG_LCUTNPAR 14 1
SYTCUG_LCUTPCCT 1A 2
SYTCUG_LCUTPHYS 15 80
SYTCUG_LCUTSLCE 18 2
SYTCUG_LCUT204A 15 40
SYTCUG_LCUT204E 15 10
SYTCUG_LCUT204S 15 20
SYTCUG_LPARCAF 30 4
SYTCUG_LPARNAME 28 8
SYTCUG_LPNUMBER 1C 2
SYTCUG_MRHDR 0 0
SYTCUG_SSI2HTGC 39 10
SYTCUG_SSI2HTGC 39 08
SYTCUG_SSI2HTGC 39 04
SYTCUG_SSI2HTGC 39 02
SYTCUG_SSI2HTGC 39 01
SYTCUG_SSI2HTSC 38 10
SYTCUG_SSI2HTSC 38 08
SYTCUG_SSI2HTSC 38 04
SYTCUG_SSI2HTSC 38 02
SYTCUG_SSI2HTSC 38 01
SYTCUG_SSI2MTFI 38 80
SYTCUG_SSI2MTGF 39 1
SYTCUG_SSI2MTID 3A 1
SYTCUG_SSI2MTIF 38 1
SYTCUG_SSI2PSMT 3A 10
SYTCUG_SSI2PSMT 3A 08
SYTCUG_SSI2PSMT 3A 04
SYTCUG_SSI2PSMT 3A 02
SYTCUG_SSI2PSMT 3A 01
This information is based on z/VM V6R3.0.
Last updated on 20 Aug 2017 at 20:27:38.
Copyright IBM Corporation, 1990, 2017