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Programming Interface Information:
The Monitor Records are intended Programming Interfaces that allow the customer to write programs to obtain services of z/VM. |
MRMTRSYS
PrologControl Block Contents
Cross Reference
MRMTRSYS Prolog
DSECT NAME - MTRSYS
FUNCTION - Map a Monitor record.
LOCATED BY -
Through the Monitor Control Area
REFERENCED CONTROL BLOCKS -
MRRECHDR Monitor Record Header
NAME - MRMTRSYS
DESCRIPTIVE NAME - Monitor Sample Configuration Record
Domain 1 - Monitor Domain
Record 4 - System Configuration Data
DESCRIPTION - Identifies operating system and defines any
special processing capabilities.
NOTE: Bits will be added to MTRSYS_CALLEVEL for APARs
that introduce changes to Monitor that may be
ambiguous based on record length and release level.
These bits will be reset in a future release.
For additional information about the format and
meaning of the MTRSYS_STSI111 field, refer to the
following book:
- Principles of Operation for the layout of the
STSI 1.1.1 output (first 180 bytes) which is
documented in Chapter 10 under "STORE SYSTEM
INFORMATION". The field meanings are there also.
When a field in this record uses the term "CPU/core",
the meaning of the field changes based on whether
Multithreading (MT) is enabled in the configuration
(partition or virtual machine) in which z/VM is
running. Refer to field MTRSYS_SYSMT to determine
whether MT is enabled in this configuration.
When MT is not enabled, a physical core contains
only one CPU:
- CPU : central processing unit.
- CORE : physical unit containing one CPU.
In this environment the core has
1 thread, the term "thread" is not used,
and the term "CPU" is generally favored
over the term "core".
When MT is enabled, a physical core contains one or
more CPUs (aka "threads"):
- CPU : central processing unit. Identified by
CPU address which consists of core ID
and thread ID.
- CORE : physical unit containing one or more CPUs
(aka "threads"). All CPUs of a core have
the same CPU type.
- THREAD: synonym for a CPU that is a member of a
core. Each thread on a core has a
distinct thread ID (TID), numbered from
0 up to the maximum thread ID available
on the core.
MRMTRSYS Control Block Contents
Offsets Dec Hex Type Len Name (Dim) Description 0 0 Structure 452 MTRSYS Start of monitor record 0 0 Character 0 MTRSYS_MRHDR Record header. See MRRECHDR for details. 0 0 Character 20 MRHDR 0 0 Unsigned 2 MRHDRLEN 2 2 Unsigned 2 MRHDRZER 4 4 Unsigned 1 MRHDRDM 5 5 Unsigned 1 * 6 6 Unsigned 2 MRHDRRC 8 8 Character 8 MRHDRTOD 16 10 Character 4 * 20 14 Character 0 MRHDR_END 20 14 Bitstring 8 MTRSYS_HCPCPEPP Program product bit map. This is a CP internal indicator of release level of the program product. For the meaning of the bit map, see the output descriptions of Diagnose X'00' in the CP Programming Services manual. 28 1C Character 8 MTRSYS_HCPCPEID Version number, in EBCDIC format. Byte 0 = release number. Byte 1 = modification level number. Bytes 2-3 = version number. Bytes 4-7 = service level. 36 24 Character 8 MTRSYS_SYSTODST TOD clock at last IPL 44 2C Character 8 MTRSYS_SYSTERM TOD clock at termination 52 34 Character 8 MTRSYS_SYSDATE Current date 60 3C Character 8 MTRSYS_SYSABNCD Abend code of last termination 68 44 Unsigned 4 * Reserved for IBM use. Previous field is no longer meaningful. (MTRSYS_SYSVFCVM) 72 48 Unsigned 4 * Reserved for IBM use. Previous field is no longer meaningful. (MTRSYS_SYSVFIVM) 76 4C Unsigned 4 * Reserved for IBM use. Previous field is no longer meaningful. (MTRSYS_SYSVFOVM) 80 50 Unsigned 4 MTRSYS_SYSZONE TOD clock time zone facility differential. Add this to a TOD time stamp to get the local time. The units here are seconds. 84 54 Bitstring 1 MTRSYS_CALFLGS Miscellaneous Flags 1... .... MTRSYS_SYSMASFI ESA/370 hardware (Access Registers) is installed .1.. .... MTRSYS_CALADMF Asynchronous Data Mover Installed ..1. .... MTRSYS_SYSDVACT Subchannel-Device-Active-Only Measurement Protocol is installed - this means that the hardware is accumulating device-active-only measurements as opposed to CP calculating them manually ...1 .... MTRSYS_SYSCPMF Channel Path Measurment Facility (CPMF) is installed .... 1... MTRSYS_SYSECPMF CPMF with extended channel meas. is installed .... .1.. MTRSYS_CALESAME The CP nucleus is a z/Arch nucleus. .... ..1. MTRSYS_SYSSI370 Interpretive execution of S/370 guests is installed. .... ...1 MTRSYS_SYSSTIOP Store I/O Processor Utilization Data is available 85 55 Unsigned 1 MTRSYS_SYSVRFSG Preferred guest storage granularity. The defined storage size of each V=F guest must be a multiple of this number of megabytes 86 56 Bitstring 1 MTRSYS_CALFLG2 Miscellaneous Flags 1... .... MTRSYS_SYSXIOMB Extended-I/O-measurement-bloc k facility is installed. This means Device-Busy Time is being stored in the measurement block and format-1 measurement blocks are being used. .1.. .... MTRSYS_SYSMASST Collaborative Memory Management Facility permitted. Note: Even if this flag indicates the Collaborative Memory Management Facility is off, some users may be using CMM prior to it being turned off. These users will be in "active, pending off" state. ..1. .... MTRSYS_PFXACMM Collaborative Memory Management Facility is available. Note: If this flag is off, any virtual machines with VMDMAACT=1 are using the CMM Facility as simulated by VM. ...1 .... MTRSYS_SSI1TRNS Transient CCR and CAI. .... 1... MTRSYS_SYSNCPMF Enhanced-channel-measurements facility is installed. .... .1.. MTRSYS_CALNCPMF CPMF with the extended channel measurement facility is installed but due to the Global Performance Data setting on the HMC it cannot be started. .... ..1. MTRSYS_SYSISVRT The system is running in vertical polarization mode. If this bit is off, the system is running in horizontal polarization mode. .... ...1 * 87 57 Bitstring 1 MTRSYS_CALLEVEL Monitor service level based on APARs available. 1... .... MTRSYS_LEVEL1 Reserved and unavailable for use .1.. .... MTRSYS_LEVEL2 Reserved and unavailable for use ..1. .... MTRSYS_LEVEL3 APAR VM65583 is available ...1 .... MTRSYS_LEVEL4 Reserved for IBM use .... 1... MTRSYS_LEVEL5 Reserved for IBM use .... .1.. MTRSYS_LEVEL6 Reserved for IBM use .... ..1. MTRSYS_LEVEL7 Reserved for IBM use .... ...1 MTRSYS_LEVEL8 Reserved for IBM use 88 58 Character 8 MTRSYS_SYSTMID System Identifier 96 60 Character 6 MTRSYS_SYSCKVOL The volume serial of the Checkpoint volume. 102 66 Character 6 MTRSYS_SYSWMVOL The volume serial of the Warmstart volume.
STSI 1.1.1 fields
Offsets Dec Hex Type Len Name (Dim) Description 108 6C Character 4 MTRSYS_SYSMTYPE STSI 1.1.1 field. Machine Type number of the configuration. 112 70 Character 16 MTRSYS_SYSMMODL STSI 1.1.1 field. Model-Capacity Identifier of the configuration. 128 80 Character 16 MTRSYS_SYSMSEQC STSI 1.1.1 field. The sequence Code of the configuration. 144 90 Character 4 MTRSYS_SYSMPOM STSI 1.1.1 field. Identifies the Plant of manufacture for the configuration.
STSI 2.2.2 fields Obtain STSI level-2 data when available. This configuration data will indicate the configuration information for an LPAR when available otherwise it will remain as default binary 0 values.
Offsets Dec Hex Type Len Name (Dim) Description 148 94 Unsigned 2 MTRSYS_LPNUMBER STSI 2.2.2 field. LPAR Number of the level-2 configuration. This number is unique to this configuration from all other level-2 configurations provided by the same LPAR hypervisor. 150 96 Bitstring 1 MTRSYS_CPUCHAR STSI 2.2.2 field. Describes the characteristics of the logical CPUs/cores that are provided for the level-2 configuration. 151 97 Bitstring 1 MTRSYS_CALFLG3 Miscellaneous Flags 1... .... MTRSYS_PFXVVMXA When ON, system is running second level. .1.. .... MTRSYS_SYSGPRFD This flag is not applicable when MTRSYS_PFXVVMXA is ON. When MTRSYS_PFXVVMXA is OFF and MTRSYS_SYSGPRFD is ON, global performance data (GPD) is enabled for this partition. ..1. .... * ...1 .... * .... 1... * .... .1.. * .... ..1. * .... ...1 * 152 98 Unsigned 2 MTRSYS_CPUCOUNT STSI 2.2.2 field. Specifies the total number of logical CPUs/cores that are provided for this level-2 configuration. This number includes all of the logical CPUs/cores that are in the configured state, the standby state, or the reserved state. Secondary processors are not included in this count. 154 9A Unsigned 2 MTRSYS_CPUCFGCT STSI 2.2.2 field. Specifies the number of logical CPUs/cores for this level-2 configuration that are in the configured state. Secondary processors are not included in this count. 156 9C Unsigned 2 MTRSYS_CPUSTNBY STSI 2.2.2 field. Specifies the number of logical CPUs/cores for this level-2 configuration that are in the standby state. A logical CPU/core is in the standby state when it is in the level-2 configuration, is not available to be used to execute programs, and can be made available by issuing instructions to place it into the configured state. Secondary processors are not included in this count. 158 9E Unsigned 2 MTRSYS_CPURESVD STSI 2.2.2 field. Specifies the number of logical CPUs/cores for this level-2 configuration that are in the reserved state. A logical CPU/core is in the reserved state when it is in the level-2 configuration, is not available to be used to execute programs, and cannot be made available by issuing instructions to place it into the configured state. Secondary processors are not included in this count. 160 A0 Character 8 MTRSYS_LPARNAME STSI 2.2.2 field. Specified the name of this level-2 configuration. 168 A8 Unsigned 4 MTRSYS_LPARCAF STSI 2.2.2 field. The LPAR Capability Adjustment Factor specifies the amount of the underlying level-1 configuration capability that is allowed to be used for this level-2 configuration by the LPAR hypervisor. The maximum value is 1000, and the fraction of level-1 configuration capability is determined by dividing the CAF value by 1000. 172 AC Unsigned 2 MTRSYS_CPUDEDCT STSI 2.2.2 field. Specifies the number of configured-state logical CPUs/cores for this level-2 configuration that are provided using dedicated level-1 CPUs/cores 174 AE Unsigned 2 MTRSYS_CPUSHARD STSI 2.2.2 field. Specifies the number of configured-state logical CPUs/cores for this level-2 configuration that are provided using shared level-1 CPUs/cores. 176 B0 Unsigned 4 MTRSYS_CPUCAPAB STSI 1.2.2 field. The capability of a general CPU/core in the configuration. The lower the value, the higher the CPU/core capability. The value indicates the capability of a CPU/core relative to other processor models. This value applies to each of the general CPUs/cores in the configuration. All the general CPUs/cores have the same capability. Expressed in binary integer format. 180 B4 Unsigned 4 MTRSYS_SCPCAPAB STSI 1.2.2 field. The capability of a specialty CPU/core in the configuration. The value indicates the capability of the CPU/core relative to the capability of other processor models and also relative to the capability of other CPU types within a model. All CPUs/cores in the configuration of an applicable type have the same capability. When zero, all CPUs/cores of any CPU type in the configuration have the same capability, as specified by MTRSYS_CPUCAPAB. Expressed in binary integer format. 184 B8 Bitstring 1 MTRSYS_SYSCMODE Processor Configuration Mode Only one bit value may be set at a time 1... .... * .1.. .... * ..1. .... * ...1 .... * .... 1... * .... .1.. MTRSYS_SYSCMESA ESA/390 .... ..1. MTRSYS_SYSCMLIN Linux-only .... ...1 MTRSYS_SYSCMVM z/VM 185 B9 Unsigned 1 MTRSYS_SYSCCR Capacity-Change Reason. from STSI 1.1.1 186 BA Unsigned 1 MTRSYS_SYSCAI Capacity-Adjustment Indication from STSI 1.1.1 187 BB Unsigned 1 MTRSYS_SYSESTAT Ensemble Status X'00' Unavailable X'01' Disabled by CP X'02' Waiting for SMAPI Server X'03' Disabled by SMAPI Server X'80' Ensemble member 188 BC Character 8 MTRSYS_STITODOF STP TOD clock offset 188 BC Character 4 MTRSYS_TODOFHI Hi-order half of TOD 192 C0 Character 4 MTRSYS_TODOFLO Lo-order half of TOD 196 C4 Bitstring 1 MTRSYS_SYSSTPFL STP configuration info 1... .... MTRSYS_SYSSTPEN STP Timestamping enabled in the configuration file .1.. .... MTRSYS_SYSSTPTZ STP Timezone usage enabled in the configuration file ..1. .... MTRSYS_SYSSTPND XRC_OPTIONAL enabled in the configuration file ...1 .... MTRSYS_SYSSTPTS XRC_TEST enabled in the configuration file .... 1... MTRSYS_SYSSTPAC STP is active .... .1.. MTRSYS_SYSSTPSU STP is suspended .... ..1. MTRSYS_SYSSTPMI STP suspension message has been issued .... ...1 * 197 C5 Bitstring 1 MTRSYS_SYSSTPF2 STP configuration info 1... .... MTRSYS_SYSSTPFI STP hardware feature is installed .1.. .... MTRSYS_SYSSTPFE STP hardware feature is enabled ..1. .... * ...1 .... * .... 1... * .... .1.. * .... ..1. * .... ...1 * 198 C6 Bitstring 1 MTRSYS_SYSPCIFG PCI flags 1... .... MTRSYS_SYSPCIYS System supports PCI usage .1.. .... MTRSYS_SYSPCIAI Forwarding is ON ..1. .... * ...1 .... * .... 1... * .... .1.. * .... ..1. * .... ...1 * 199 C7 Bitstring 1 MTRSYS_SYSIOFI4 I/O Facilities Installed Flag 1... .... * .1.. .... * ..1. .... * ...1 .... * .... 1... * .... .1.. * .... ..1. MTRSYS_SYSDIOIA Dynamic-I/O-for-I/O-Adapters facility is installed .... ...1 MTRSYS_SYSUSF Utility-String facility is installed 200 C8 Character 6 MTRSYS_SYSPLVOL SSI PDR Volume serial 206 CE Unsigned 1 MTRSYS_SYSCSSID Channel subsystem (CSS) ID 207 CF Character 1 * Reserved and available for use 208 D0 Character 8 MTRSYS_SYSCPMOD CP Load Module 216 D8 Character 8 MTRSYS_HCPLODCK TOD of system generation of CP Load Module 224 E0 Character 16 MTRSYS_SLMENSID Unified Resource Manager ensemble ID 240 F0 Character 180 MTRSYS_STSI111 First 180 bytes of the STSI 1.1.1 output. 420 1A4 Unsigned 4 MTRSYS_RCCCCAPF STSI 1.2.2 field. The capability of a general CPU/core in the configuration in binary floating point (BFP) format. Used as an indication of the capability of the CPU/core relative to the capability of other processor models. 424 1A8 Unsigned 4 MTRSYS_RCCSCAPF STSI 1.2.2 field. The capability of a specialty CPU/core in the configuration in BFP format. Used as an indication of the capability of the CPU/core relative to the capability of other processor models. If this field is zero, field MTRSYS_RCCCCAPF specifies also the capability of a specialty CPU/core. 428 1AC Bitstring 1 MTRSYS_SYSMTFLG Multithreading Flags which may take the following values: 1... .... MTRSYS_SYSMTSTM X'80' MULTITHREADING statement specified Enable .1.. .... MTRSYS_SYSMT X'40' Multithreading is enabled ..1. .... MTRSYS_SYSMTVAL X'20' Found a valid MULTITHREADING statement ...1 .... * .... 1... * .... .1.. * .... ..1. * .... ...1 * 429 1AD Bitstring 1 MTRSYS_RCCMTRSM MT Not enabled reason mask which may take the following values: 1... .... MTRSYS_RCCMTNTI X'80' MT Facility is not installed in the configuration .1.. .... MTRSYS_RCCMT390 X'40' ESA/390 LPAR ..1. .... MTRSYS_RCCMTLCP X'20' LINUX only LPAR with CP processors ...1 .... MTRSYS_RCCMTCRF X'10' Lack of corequisite facilities .... 1... MTRSYS_RCCMTRBL X'08' SRM statement specified rebalance .... .1.. MTRSYS_RCCMTHOR X'04' Horizontal polarization .... ..1. MTRSYS_RCCMTHIG X'02' IPL CPU addr is too high .... ...1 MTRSYS_RCCMTSFA X'01' SIGP failure, see RCCMTFRS 430 1AE Bitstring 1 MTRSYS_RCCMTCFM Missing corequisite facilities mask which may take the following values: 1... .... MTRSYS_RCCMTRF1 X'80' Facility 1 required by MT is missing .1.. .... MTRSYS_RCCMTCSV X'40' Facility 2 is not available ..1. .... MTRSYS_RCCSCCMV X'20' Store-CPU-Counter-Multiple facility is not available ...1 .... * .... 1... * .... .1.. * .... ..1. * .... ...1 * 431 1AF Unsigned 1 MTRSYS_RCCMTPMT Multithreading program-specified maximum thread id in a range from zero to 31 432 1B0 Unsigned 1 MTRSYS_RCCMTTDW Thread id width in a range from 0 to 5 433 1B1 Unsigned 1 MTRSYS_RCCMTFRS SIGP set-multithreading order failure code 0 0 434 1B2 Unsigned 1 MTRSYS_RCCCOMXT Value specified on MAX_THREADS 435 1B3 Unsigned 1 MTRSYS_RCCCOALL Value specified on ALL. RCCCOALL is used only during statement processing and has no meaning during system operation 436 1B4 Unsigned 2 MTRSYS_CAL_CPUTAOFF Offset to array MTRSYS_CPUTINFO of numbers for threads per core by CPU type 438 1B6 Unsigned 1 MTRSYS_CAL_CPUTACNT Number of entries in MTRSYS_CPUTINFO array. 439 1B7 Character 1 * alignment padding 440 1B8 Unsigned 2 MTRSYS_CAL_CPUTAESZ Size of an entry in the MTRSYS_CPUTINFO array 442 1BA Character 2 * alignment padding 444 1BC Unsigned 4 MTRSYS_RCCSPCP CP CPU speed . When not zero, contains a 32-bit unsigned binary integer which is the approximate number of CPU cycles per microsecond. 448 1C0 Unsigned 4 MTRSYS_RCCSPSPC Specialty engine CPU speed. When not zero, contains a 32-bit unsigned binary integer which is the approximate number of CPU cycles per microsecond. 452 1C4 Character 0 MTRSYS_END End of record
Offsets Dec Hex Type Len Name (Dim) Description 0 0 Structure 8 MTRSYS_CPUTINFO 0 0 Unsigned 1 MTRSYS_CAL_CPUTYPE CPU Type for this entry 1 1 Unsigned 1 MTRSYS_CAL_RCCCOMNT Requested threads for this CPU type from RCCCOxxx 2 2 Unsigned 1 MTRSYS_CAL_RCCHWMNT Maximum number of threads supported by hardware by CPU type from RCCHWxxx 3 3 Unsigned 1 MTRSYS_CAL_RCCSYMNT Maximum number of threads supported by z/VM by CPU type from RCCSYxxx 4 4 Unsigned 1 MTRSYS_CAL_RCCACMNT Number of activated threads by CPU type from RCCACxxx 5 5 Character 3 * Reserved 8 8 Character 0 MTRSYS_CPUTINFO_END End of CPUTINFO entry
MRMTRSYS Cross Reference
Hex Hex
Name Offset Length Value
MRHDR 0 20
MRHDR_END 14 0
MRHDRDM 4 1
MRHDRLEN 0 2
MRHDRRC 6 2
MRHDRTOD 8 8
MRHDRZER 2 2
MTRSYS 0 452
MTRSYS_CAL_CPUTACNT 1B6 1
MTRSYS_CAL_CPUTAESZ 1B8 2
MTRSYS_CAL_CPUTAOFF 1B4 2
MTRSYS_CAL_CPUTYPE 0 1
MTRSYS_CAL_RCCACMNT 4 1
MTRSYS_CAL_RCCCOMNT 1 1
MTRSYS_CAL_RCCHWMNT 2 1
MTRSYS_CAL_RCCSYMNT 3 1
MTRSYS_CALADMF 54 40
MTRSYS_CALESAME 54 04
MTRSYS_CALFLGS 54 1
MTRSYS_CALFLG2 56 1
MTRSYS_CALFLG3 97 1
MTRSYS_CALLEVEL 57 1
MTRSYS_CALNCPMF 56 04
MTRSYS_CPUCAPAB B0 4
MTRSYS_CPUCFGCT 9A 2
MTRSYS_CPUCHAR 96 1
MTRSYS_CPUCOUNT 98 2
MTRSYS_CPUDEDCT AC 2
MTRSYS_CPURESVD 9E 2
MTRSYS_CPUSHARD AE 2
MTRSYS_CPUSTNBY 9C 2
MTRSYS_CPUTINFO 0 8
MTRSYS_CPUTINFO_END 8 0
MTRSYS_END 1C4 0
MTRSYS_HCPCPEID 1C 8
MTRSYS_HCPCPEPP 14 8
MTRSYS_HCPLODCK D8 8
MTRSYS_LEVEL1 57 80
MTRSYS_LEVEL2 57 40
MTRSYS_LEVEL3 57 20
MTRSYS_LEVEL4 57 10
MTRSYS_LEVEL5 57 08
MTRSYS_LEVEL6 57 04
MTRSYS_LEVEL7 57 02
MTRSYS_LEVEL8 57 01
MTRSYS_LPARCAF A8 4
MTRSYS_LPARNAME A0 8
MTRSYS_LPNUMBER 94 2
MTRSYS_MRHDR 0 0
MTRSYS_PFXACMM 56 20
MTRSYS_PFXVVMXA 97 80
MTRSYS_RCCCCAPF 1A4 4
MTRSYS_RCCCOALL 1B3 1
MTRSYS_RCCCOMXT 1B2 1
MTRSYS_RCCMTCFM 1AE 1
MTRSYS_RCCMTCRF 1AD 10
MTRSYS_RCCMTCSV 1AE 40
MTRSYS_RCCMTFRS 1B1 1
MTRSYS_RCCMTHIG 1AD 02
MTRSYS_RCCMTHOR 1AD 04
MTRSYS_RCCMTLCP 1AD 20
MTRSYS_RCCMTNTI 1AD 80
MTRSYS_RCCMTPMT 1AF 1
MTRSYS_RCCMTRBL 1AD 08
MTRSYS_RCCMTRF1 1AE 80
MTRSYS_RCCMTRSM 1AD 1
MTRSYS_RCCMTSFA 1AD 01
MTRSYS_RCCMTTDW 1B0 1
MTRSYS_RCCMT390 1AD 40
MTRSYS_RCCSCAPF 1A8 4
MTRSYS_RCCSCCMV 1AE 20
MTRSYS_RCCSPCP 1BC 4
MTRSYS_RCCSPSPC 1C0 4
MTRSYS_SCPCAPAB B4 4
MTRSYS_SLMENSID E0 16
MTRSYS_SSI1TRNS 56 10
MTRSYS_STITODOF BC 8
MTRSYS_STSI111 F0 180
MTRSYS_SYSABNCD 3C 8
MTRSYS_SYSCAI BA 1
MTRSYS_SYSCCR B9 1
MTRSYS_SYSCKVOL 60 6
MTRSYS_SYSCMESA B8 04
MTRSYS_SYSCMLIN B8 02
MTRSYS_SYSCMODE B8 1
MTRSYS_SYSCMVM B8 01
MTRSYS_SYSCPMF 54 10
MTRSYS_SYSCPMOD D0 8
MTRSYS_SYSCSSID CE 1
MTRSYS_SYSDATE 34 8
MTRSYS_SYSDIOIA C7 02
MTRSYS_SYSDVACT 54 20
MTRSYS_SYSECPMF 54 08
MTRSYS_SYSESTAT BB 1
MTRSYS_SYSGPRFD 97 40
MTRSYS_SYSIOFI4 C7 1
MTRSYS_SYSISVRT 56 02
MTRSYS_SYSMASFI 54 80
MTRSYS_SYSMASST 56 40
MTRSYS_SYSMMODL 70 16
MTRSYS_SYSMPOM 90 4
MTRSYS_SYSMSEQC 80 16
MTRSYS_SYSMT 1AC 40
MTRSYS_SYSMTFLG 1AC 1
MTRSYS_SYSMTSTM 1AC 80
MTRSYS_SYSMTVAL 1AC 20
MTRSYS_SYSMTYPE 6C 4
MTRSYS_SYSNCPMF 56 08
MTRSYS_SYSPCIAI C6 40
MTRSYS_SYSPCIFG C6 1
MTRSYS_SYSPCIYS C6 80
MTRSYS_SYSPLVOL C8 6
MTRSYS_SYSSI370 54 02
MTRSYS_SYSSTIOP 54 01
MTRSYS_SYSSTPAC C4 08
MTRSYS_SYSSTPEN C4 80
MTRSYS_SYSSTPFE C5 40
MTRSYS_SYSSTPFI C5 80
MTRSYS_SYSSTPFL C4 1
MTRSYS_SYSSTPF2 C5 1
MTRSYS_SYSSTPMI C4 02
MTRSYS_SYSSTPND C4 20
MTRSYS_SYSSTPSU C4 04
MTRSYS_SYSSTPTS C4 10
MTRSYS_SYSSTPTZ C4 40
MTRSYS_SYSTERM 2C 8
MTRSYS_SYSTMID 58 8
MTRSYS_SYSTODST 24 8
MTRSYS_SYSUSF C7 01
MTRSYS_SYSVRFSG 55 1
MTRSYS_SYSWMVOL 66 6
MTRSYS_SYSXIOMB 56 80
MTRSYS_SYSZONE 50 4
MTRSYS_TODOFHI BC 4
MTRSYS_TODOFLO C0 4
This information is based on z/VM V6R3.0.
Last updated on 21 Feb 2016 at 17:09:38.
Copyright IBM Corporation, 1990, 2016