Programming Interface Information:
The Monitor Records are intended Programming Interfaces that allow the customer to write programs to obtain services of z/VM. |
MRMTRCCC
PrologControl Block Contents
Cross Reference
MRMTRCCC Prolog
DSECT NAME - MTRCCC FUNCTION - Map a Monitor record. LOCATED By - Through the Monitor Control Area REFERENCED CONTROL BLOCKS - MRRECHDR Monitor Record Header NAME - MRMTRCCC DESCRIPTIVE NAME - Monitor Event Record Domain 1 - Monitor Domain Record 18 - CPU Capability Change DESCRIPTION - Record of a CPU Capability Change reported by the Support Element. NOTES: 1. For additional information about the format and meaning of the MTRCCC_STSI111 field, refer to the following book: - Principles of Operation for the layout of the STSI 1.1.1 output (first 180 bytes) which is documented in Chapter 10 under "STORE SYSTEM INFORMATION". The field meanings are there also.
MRMTRCCC Control Block Contents
Offsets Dec Hex Type Len Name (Dim) Description 0 0 Structure 236 MTRCCC Start of monitor record 0 0 Character 0 MTRCCC_MRHDR Record header - see MRRECHDR for details 0 0 Character 20 MRHDR 0 0 Unsigned 2 MRHDRLEN record length in bytes 2 2 Unsigned 2 MRHDRZER field of zeros 4 4 Unsigned 1 MRHDRDM domain identifier 5 5 Unsigned 1 * 6 6 Unsigned 2 MRHDRRC record identifier 8 8 Character 8 MRHDRTOD Time at which this record was built. In time-of-day (TOD) clock format. See IBM System 370 XA Principle of Operation for explanation of format. 16 10 Character 4 * 20 14 Character 0 MRHDR_END End of header 20 14 Unsigned 4 MTRCCC_CPUCAPAB The capability of a CPU in the configuration. In integer format. 24 18 Unsigned 4 MTRCCC_SCPCAPAB The capability of a secondary CPU in the configuration. When zero, all CPUs of any CPU type in the configuration have the same capability, as specified by the CPU capability, MTRCCC_CPUCAPAB. In integer format. 28 1C Unsigned 4 MTRCCC_NCPCAPAB The nominal capability of a CPU in the configuration. When zero, this means the system is not operating at reduced speed, so the primary capability, MTRCCC_CPUCAPAB, value applies. In integer format. 32 20 Unsigned 1 MTRCCC_SYSCCR Capacity-Change Reason. 33 21 Unsigned 1 MTRCCC_SYSCAI Capacity-Adjustment Indication. 34 22 Bitstring 1 MTRCCC_SSI1FLGS Miscellaneous flags. 1... .... MTRCCC_SSI1TRNS Transient CCR and CAI. .1.. .... * ..1. .... * ...1 .... * .... 1... * .... .1.. * .... ..1. * .... ...1 * 35 23 Unsigned 1 * RESERVED and available for IBM use. 36 24 Character 180 MTRCCC_STSI111 First 180 bytes of the STSI 1.1.1 output. 216 D8 Unsigned 4 MTRCCC_RCCCCAPF The capability of a CPU configuration. In Binary Floating Point format. 220 DC Unsigned 4 MTRCCC_RCCSCAPF The capability of a secondary CPU in the configuration. When zero, all CPUs of any CPU type in the configuration have the same capability, as specified by the CPU capability, MTRCCC_RCCCCAPF. In BFP format. 224 E0 Unsigned 4 MTRCCC_RCCNCAPF The nominal capability of a CPU in the configuration. When zero, this means the system is not operating at reduced speed, so the primary capability, MTRCCC_RCCSCAPF, value applies. In BFP format. 228 E4 Unsigned 4 MTRCCC_RCCSPCP CP CPU speed. 232 E8 Unsigned 4 MTRCCC_RCCSPSCP Specialty engine CPU speed. 236 EC Character 0 MTRCCC_END
MRMTRCCC Cross Reference
Hex Hex Name Offset Length Value MRHDR 0 20 MRHDR_END 14 0 MRHDRDM 4 1 MRHDRLEN 0 2 MRHDRRC 6 2 MRHDRTOD 8 8 MRHDRZER 2 2 MTRCCC 0 236 MTRCCC_CPUCAPAB 14 4 MTRCCC_END EC 0 MTRCCC_MRHDR 0 0 MTRCCC_NCPCAPAB 1C 4 MTRCCC_RCCCCAPF D8 4 MTRCCC_RCCNCAPF E0 4 MTRCCC_RCCSCAPF DC 4 MTRCCC_RCCSPCP E4 4 MTRCCC_RCCSPSPC E8 4 MTRCCC_SCPCAPAB 18 4 MTRCCC_SSI1FLGS 22 1 MTRCCC_SSI1TRNS 22 80 MTRCCC_STSI111 24 180 MTRCCC_SYSCAI 21 1 MTRCCC_SYSCCR 20 1
This information is based on z/VM V6R3.0.
Last updated on 21 Feb 2016 at 16:31:38.
Copyright IBM Corporation, 1990, 2016