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Hex Dec Type/Val Lng Label (dup) Comments
---- ---- --------- ---- -------------- --------
0000 0 Structure VPG64 VIRTUAL PAGE BLOCK
0000 0 Dbl-Word 8 VPGGPAG Page Table Entry
0008 8 Dbl-Word 8 VPGGNEXT (0) Address for next VPGBK
0008 8 Dbl-Word 8 * (255)
0800 2048 Dbl-Word 8 VPGGPGS Page Status Table Entry
0808 2056 Dbl-Word 8 * (255)
1000 4096 Dbl-Word 8 VPGGASA Auxiliary Storage Address Entry
1008 4104 Dbl-Word 8 * (255)
Mapping for a PAG64 (PTE)
0000 0 Dbl-Word 8 VPGGPTE (0) VPGBK Page Table Entry
0000 0 Dbl-Word 8 VPGGPNTR Hardware Page Table Entry
0000 0 Signed 4 VPGGPTE0 Word 0 of PTE
0004 4 Signed 4 VPGGPTE1 Word 1 of PTE
0000 0 Signed 2 VPGGPLNK This field is used to point to
the next free Page Table Entry
available in this PGMBK (for non-
Pageable PGMBK frames only -
NPGM) which were previously
deallocated.
0002 2 Signed 2 * Reserved for IBM use
0004 4 Signed 4 * Reserved for IBM use
0000 0 Signed 4 VPGGXSBN Xstore block number if PTE is not
valid and PGSXSTOR is b'1'
0004 4 Bitstring 1 VPGGXSTS (20) Xstore time stamp (lowest 20
bits)
0018 24 Bitstring 1 * (4) Reserved for IBM use
001C 28 Bitstring 1 * Reserved for IBM use
0000 0 Signed 4 * Bits 0-31 of PFRA
0004 4 Signed 2 * Bits 32-47 of PFRA
0006 6 Bitstring 1 VPGGPSTA Bits 48-51 of PFRA For a
valid-in-real-storage PTE, bits
52 and 55 must be zero. Bits 53
and 54 are Page-invalid and
Page-protection, respectively.
1111 .... PAGGSPFR X'F0' PAGGSPFR Bits 48-51 of PFRA
(if resident)
.... 1..1 PAGGSMBZ X'09' PAGGSMBZ Must be zero in
any valid PTE when EDAT-1 does
not apply. Bits 52, 55
.... 1... PAGGEMBZ X'08' PAGGEMBZ Must be zero in
any valid PTE when EDAT-1 does
apply. Bit 52
.... .1.. PAGGINVA X'04' PAGGINVA PTE is invalid:
I-bit. To turn off this bit,
SHORT pg. serialization must be
held unless the bit is being
turned off by HPMA or by fastpath
resolve which require only
PCLONLY Bit 53
.... ..1. PAGGPROT X'02' PAGGPROT Page protected
(read only): P-bit Bit 54
.... ...1 PAGGCHOV X'01' PAGGCHOV Change-recording
Override. Bit 55
.... ...1 PAGGIEP X'01' PAGGIEP
Instruction-Execution-Protection
Bit 55
.... .1.1 PAGGSXVA X'05' PAGGSXVA Page is invalid,
but is valid in xstore This is a
non-architected software
definition. Bits 53, 55
0007 7 Bitstring 1 * This byte is not architected and
is available for software use. It
is recommended that software
refrain from using this byte
unless it is to store the guest
storage key.
0000 0 Dbl-Word 8 VPGGPASA2 PTRM 2nd ASA. For PTRM PTEs only,
and only when PGMBK is on DASD or
as a transient condition when the
PGMBK is headed to/from DASD.
Note that I and P bits must be
preserved and are unavailable as
ASA or status bits. See HCPASATE
for ASA formats.
Mapping for a PGS64 (PGSTE)
0800 2048 Dbl-Word 8 VPGGPGST (0) VPGBK Page Status Entry
0800 2048 Dbl-Word 8 VPGGSNTR Virtual Page Status Entry
0800 2048 Signed 4 VPGGPGS0 Word 0 of PGSTE
0804 2052 Signed 4 VPGGPGS1 Word 1 of PGSTE
0800 2048 Bitstring 3 VPGGVRSF Field containing VPGGSVKY,
VPGGSRCP and VPGGSFLG
0803 2051 Bitstring 1 * Reserved for IBM use
0800 2048 Bitstring 1 VPGGSVKY Guest Storage Key Bits 0-4
0801 2049 Bitstring 1 VPGGSRCP Architected area for RCP Byte If
the storage key assist is being
utilized. (See the PGSTE and
RCPTE Control Blocks for further
details)
1... .... RCPLOCK X'80' RCPLOCK RCP LOCK HELD
.1.. .... RCPHREF X'40' RCPHREF HOST BACKUP
REFERENCE BIT
..1. .... RCPHCH X'20' RCPHCH HOST BACKUP CHANGE
BIT
.11. .... RCPHOST RCPHREF+RCPHCH RCPHOST MASK FOR
HOST BITS
.... .1.. RCPGREF X'04' RCPGREF GUEST BACKUP
REFERENCE BIT
.... ..1. RCPGCH X'02' RCPGCH GUEST BACKUP CHANGE
BIT
.... .11. RCPGUEST RCPGREF+RCPGCH RCPGUEST MASK FOR
GUEST BITS
1... .... PGSPCL X'80' PGSPCL Page Control Lock
.1.. .... PGSRCPHR X'40' PGSRCPHR Host backup
reference bit used for system
pages
..1. .... PGSRCPHC X'20' PGSRCPHC Host backup change
bit used for system pages. Can be
changed with PCLONLY page
serialization by tasks allowed to
use PCLONLY. Set by page fault
fastpath. Note that when setting
this bit or when resetting it and
turning on the PGSZBIT bit, the
relocation change bit, PGSLGRCC
needs to be turned on.
.11. .... PGSHOST PGSRCPHR+PGSRCPHC PGSHOST Mask
for host bits
...1 .... PGSLGRCC X'10' PGSLGRCC VMRELOCATE Content
Change bit. Initialized to one.
Changed only when holding PCLONLY
or SHORT (including ERRSHORT).
Known in architecture as PGSHCB.
.... .1.. PGSGREF X'04' PGSGREF Guest backup
reference bit
.... ..1. PGSGCH X'02' PGSGCH Guest backup change
bit
.... .11. PGSGUEST PGSGREF+PGSGCH PGSGUEST Mask for
guest bits
0802 2050 Bitstring 1 VPGGSFLG Virtual Page Flags
1... .... PGSINVAL X'80' PGSINVAL No auxiliary
storage assigned Notes :
PGSINVAL, in combination with
other PTE, PGSTE, and storage key
status bits, is used by steal
processing to identify first time
reference pages of zeros which
have never been re-referenced or
changed and can simply be
discarded. The "first time
reference page of zeros" state is
identified by the following bit
combination: noformat PTE:
PAGINVAL=0 (page is valid and
resident) PGSTE: PGSINVAL=1 (no
DASD slot assigned) PGSRCPHR=0
(unreferenced) PGSRCPHC=0
(unchanged) Real frame storage
key: Reference=0 (unreferenced)
Change =0 (unchanged) enoformat
Any resident page in this state
is assumed to be unchanged zeros,
and therefore simply discardable
by steal. No page with non-zero
contents should ever be allowed
to be in this state, or a lost
page will eventually result. The
host change bit, PGSRCPHC, should
be used to indicate that a page
which is unchanged, not already
on DASD, and non-zero, must be
eventually written to DASD. *
Note that both reference bits
(PGSRCPHR and the real storage
frame reference bit) can
"evaporate" to zero over time due
to the action of the reorder
function. Therefore, the fact
that a frame has been referenced,
or setting PGSRCPHR on, can not
prevent a page from eventually
entering this "first time
reference page of zeros" state.
.1.. .... PGSSHARE X'40' PGSSHARE Page is a shared
page
..1. .... PGS1READ X'20' PGS1READ ASA may be read
only once. Used for shared pages.
After the first read, this SDF
(System Data File) ASA is to be
ignored and the page left as
changed. When the page is first
written, it will go to a paging
space ASA and this flag wil be
turned off. PGS1READ on implies
that page is read-only for the
user.
...1 .... PGSALLOC X'10' PGSALLOC Page in the system
address space (or a system-owned
utility address space) that is
allocated, OR A shared CP page in
the monitor DCSS that CP has
translated and that has not yet
been released by the user
connected to the DCSS. When this
bit is on: 1) For a system
utility space, the page is never
part of a DASD block; 2) The
associated PGMBK is never paged
out.
.... 1... PGSFIXED X'08' PGSFIXED Storage slot
permanently assigned
>>PGSPGMIO was PGSIO1ST,
PGSIO2ND
.... .1.. PGSPGMIO X'04' PGSPGMIO Indicates that
pageable PGMBK I/O has not
completed (PTRM page). Set when
the first I/O completion
interrupt is processed, reset
when the second I/O completion
interrupt is processed. Note the
I/O can complete in either order.
>>PGSPGMIM was PGSIOMSK
0803 2051 Bitstring 1 VPGGSSTA Virtual Page Status bits
1... .... PGSALTPT X'80' PGSALTPT For a target PTE,
indicates the definition of the
page is in alternate page table
pointed to by PGMGALTP. For a
source PTE, indicates data was
saved for the page. Source PTEs
can be distinguished from target
PTEs by PGMGALTP being 0.
PGSALTPT must be turned off when
assigning differentiated page
contents to the target PTE.
.1.. .... PGSPCL2 X'40' PGSPCL2 Page serialization
bit. See serialization section of
prolog for more information.
..1. .... PGSLTSER X'20' PGSLTSER Page is "Long Term
Serialized". May only be on if
PGSPCL2 is also on (though PGSPCL
may be on as well)
.... .... PGSXSTOR X'00' PGSXSTOR Page is in XSTORE
.... .1.. PGSBLOCK X'04' PGSBLOCK This page is one
page in a block of pages
.... ..1. PGSRABI X'02' PGSRABI This page was read
in as part of a block of pages.
This bit can NOT be checked for
PTRM pages, as it is redefined as
PGSXSTMB in that case. RABI pages
are made IBR when added to the
frame list.
.... ...1 PGSERROR X'01' PGSERROR Page is in error.
A storage error was detected in
this page and the page could not
be recovered. See serialization
section of the prolog for role
this bit plays in page
serialization. When this bit is
set, VMDRSSFG.VMDRSSUE must be
set in the VMDBK that owns the
space.
0803 2051 Bitstring 1 VPGGMSTA Virtual Page (PGMBK) Status bits
0804 2052 Signed 4 * Reserved
0804 2052 Bitstring 1 VPGGSB4 Virtual Page Status (Byte 4)
1... .... PGSZBIT X'80' PGSZBIT
Page-content-logically zero bit
Only meaningful when the PTE is
invalid.
.1.. .... PGSNT X'40' PGSNT Guest no translation.
When ON the guest page does not
contain any DAT structures.
..1. .... PGSCLASS X'20' PGSCLASS The page class
specifies which
Delta-pinned-page-count array is
to be used in maintaining pinned
page counts. Page class 0 (bit is
0) specifies the DPPCA for base
address space pages owned by
user. Page class 1 (bit is 1)
specifies NSS/DCSS imbedded
shared pages. The page class 0
DPPCA resides in the ASCBK and is
pointed to by SIEDPPCAO in the
format-2 state descriptor
(SI2BK). The page class 1 DPPCA
resides resides in RSMBK and is
pointed to by PFXDPPCAO in the
prefix area.
...1 .... PGSOVFLW X'10' PGSOVFLW The pin count
(PGSPINCT) has overflowed and the
current value does not represent
the total pin count. The
remainder of the total pin count
is contained in both PGSOVFL1 (a
one bit pin count overflow used
to control hardware interception)
and PGAOVFLW in the PGAUX). PTE
must be valid. Can be modified
with PCLONLY page serialization
by tasks allowed to use PCLONLY.
Set by pin/unpin fastpaths,
translation paths, and no-owned
functions. Before setting
PGSOVFLW, PGAUX should be cleared
to ensure no residual data is
present.
.... 1... PGSPROCL X'08' PGSPROCL Indicates page is
on the processed list. Turned on
by machine or fast path
processing when corresponding
FRMTE is put on processed list.
Turned off by HCPPLP processed
list processing. Can be modified
with PCLONLY page serialization
by tasks allowed to use PCLONLY.
Set by HPMA or fastpath validate
page. See PFXPROCL definition
comments in HCPPFXPG for
additional rules regarding
processed list usage and the
setting of PGSPROCL.
.... .1.. PGSCONRP X'04' PGSCONRP Indicates a
content-replacement operation
occurred on an HPMA Resolve host
page function. Can be modified
with PCLONLY page serialization
by tasks allowed to use PCLONLY.
Set by HPMA or fastpath validate
page.
.... ..1. PGSUS0 X'02' PGSUS0
.... ...1 PGSUS1 X'01' PGSUS1
.... ..11 PGSUS PGSUS0+PGSUS1 PGSUS
.... .... PGSUSS 0 PGSUSS
.... ...1 PGSUSU 1 PGSUSU
.... ..1. PGSUSP 2 PGSUSP
.... ..11 PGSUSV 3 PGSUSV
0805 2053 Bitstring 1 VPGGSB5 Virtual Page Status (Byte 5)
0806 2054 Bitstring 1 VPGGSB6 Virtual Page Status (Byte 6)
0807 2055 Bitstring 1 VPGGSB7 VPS (Byte 7) - Pin Count
0804 2052 Signed 4 VPGPPDBK 31-bit PPDBK address. Note that
this 31-bit addr doesn't conflict
with bit 0 of this fullword (bit
32 of the PGSTE), which is
PGSZBIT. Valid only in invalid
PTRM PGSTE, when PGMBK is on
DASD, or as a transient condition
when the PGMBK may be headed to
DASD.
Mapping for a ASA64 (ASATE)
Each ASA table entry is 8-bytes, with the following
format:
+------+-----+-----+-----+-----+-----+-----+-----+-----+
| Byte | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
+------+-----+-----+-----+-----+-----+-----+-----+-----+
| ECKD | -C | CC | cc | cc | PP | VV | -* | $- |
+------+-----+-----+-----+-----+-----+-----+-----+-----+
| FBA | -P | PP | PP | PP | PP | VV | -* | $- |
+------+-----+-----+-----+-----+-----+-----+-----+-----+
| Bits | 0- 7| 8-15|16-23|24-31|32-39|40-47|48-55|56-63|
+------+-----+-----+-----+-----+-----+-----+-----+-----+
| Notes : |
| - unused/available, zeros |
| * reserve B'0110' for I and P bits when in PTE, rest|
| available |
| $ reserve B'1000' for encryption bit, rest available|
| |
| When ASA is a PRBN, it is contained in bytes 0-3 and|
| bytes 4-5 will be 0. |
Although we treat a standard ASA as a 48-bit value (see
VPGGASA48), only 44 of those bits are actually relevant.
The high-order 4 bits (bits 0-3) are unused and will be
zero. When loading an ASA entry into a register, it's
often convenient to have it in the low-order portion of
the register. This could be accomplished as follows:
LG Rx,VPGGASA48
SRLG Rx,Rx,16
However, another option which accomplishes the same, but
also handles the possibility that bits 0-3 might be
non-zero (perhaps a future enhancement wishes to use these
bits) is as follows:
LG Rx,VPGGASA48
RISBGZ Rx,Rx,20,63,-16
Since the RISBGZ is not a commonly-used instruction and
is a bit complicated with so many operands, it's probably
worth a little explanation. The RISBGZ instruction takes
the 64 bits in a register (2nd operand), rotates them left
a specified number of bits (5th operand), and then inserts
a specific bit range of the result (3rd and 4th operand)
into a register (1st operand), filling in any bits not
specified in the range with zeros. In the above example,
-16 specifies a right shift of 16 bits, 20-63 are 44 bits
of the ASA we wish to retain which have now been shifted
into the low portion of the register, and bits 0-19 will
be zero.
1000 4096 Dbl-Word 8 VPGGASAT (0) VPGBK Aux Storage Address
1000 4096 Dbl-Word 8 VPGGANTR Auxiliary Storage Address
1000 4096 Signed 4 VPGGASA0 Word 0 of ASATE
1004 4100 Signed 4 VPGGASA1 Word 1 of ASATE
1000 4096 Bitstring 6 VPGGASA48 cylinder, page, volume portion
(or page, volume for FBA)
1000 4096 Bitstring 2 VPGGASAx Cyl/page extension for large ASA
(high-order 4 bits reserved and
should be 0)
1002 4098 Bitstring 4 VPGGASA32 original CCPV/PPPV portion of ASA
1002 4098 Bitstring 3 * CCP/PPP
1005 4101 Bitstring 1 VPGGAVOL Auxiliary Storage Volume Code
1000 4096 Signed 4 VPGGPRBN For mapped-minidisk, PRBN uses
the first fullword of the ASATE
1004 4100 Signed 4 VPGGAXSBN2 PTRM 2nd Xstore Block Number
(XSBN). For PTRM PTEs only, when
PGMBK is in Xstore (PGSXSTOR=1),
contains the XSBN containing the
second page of the PGM64.
1000 4096 Bitstring 6 * Bits 0-47 of ASA
1006 4102 Bitstring 1 VPGGAFLG ASA & Flags protect bits when
PTRM PTE contains 2nd ASA for
paged 8K PGMBK (to keep
consistant formats)
1007 4103 Bitstring 1 VPGGASTA ASA status
1... .... VPGENCPT X'80' VPGENCPT Page is encrypted
on auxiliary storage (DASD). The
bit is set when an encrypted page
is written. When a slot is
returned this bit is turned OFF.
Also, when a slot is allocated
this bit should be OFF. When
PGSINVAL is ON, the VPGENCPT bit
has no meaning. Serialization for
VPGENCPT is page SHORT.
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