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Hex Dec Type/Val Lng Label (dup) Comments
---- ---- --------- ---- -------------- --------
0000 0 Structure TRPBK TRACE TRAP BLOCK
0000 0 Address 4 TRPNEXT POINTER TO NEXT TRAP BLOCK IN
LIST
0004 4 Signed 4 TRPIDENT FOUR CHARACTER TRAP IDENTIFIER
0008 8 Signed 2 TRPSKIP COUNT REMAINING IN CURRENT SKIP
COUNT
000A 10 Signed 2 TRPSTOP DISPLAYS REMAINING UNTIL CONSOLE
STOP
000C 12 Signed 2 TRPPASS PASS COUNT (REFRESHES TRPPASS IF
PRESENT)
000E 14 Signed 2 TRPSTEP STEP COUNT
0010 16 Address 4 TRPCPNXT POINTER TO NEXT CP COMMAND IN
CHAIN
0014 20 Address 4 TRPCPCMD POINTER TO THIS CP COMMAND
Notes : HCPTRR and HCPTGR contain DSECTS
for TRPINEXT followed by TRPIRNG.
TRPINEXT and TRPIRNG must be on doubleword
boundaries for the code to work correctly.
0018 24 Address 4 TRPINEXT POINTER TO NEXT RANGE AFTER THIS
IRANGE.
001C 28 Signed 4 * Reserved
0020 32 Dbl-Word 8 TRPIRNG (2) Instruction fetch (ifetch) range
NOTE: The following 3 fields must remain in this
order so they can be passed as input to the
PUTADSP or FMTADSP subroutines in HCPCQE via
one register as follows:
GPR 7 = 31-BIT POINTER to address space info:
R7 -> DOUBLEWORD ASCE (TRPIASCE)
FULLWORD STO (TRPISTO )
HALFWORD ASN (TRPIASN )
0030 48 Dbl-Word 8 TRPIASCE ASCE for address space of ifetch
addr
0038 56 Signed 4 TRPISTO SEGMENT TABLE ORIGN FOR ADDRESS
SPACE OF IFETCH ADDRESS
'FFFFFFFE': INDICATE LOGICAL
ADDRESS
003C 60 Signed 2 TRPIASN Address Space Number for address
space of IFETCH range. This field
is only valid when the TRPIASNF
bit is on.
003E 62 Bitstring 1 * (2) Reserved
0040 64 Signed 2 TRPDBW NUMBER OF DOUBLEWORDS IN THIS
BLOCK
0042 66 Bitstring 1 TRPCNTRL TRACING SCREENING/OUTPUT CONTROL
1... .... TRPPROB X'80' TRPPROB RESTRICT TO PROBLEM
MODE ONLY
.1.. .... TRPSUPV X'40' TRPSUPV RESTRICT TO
SUPERVISOR MODE ONLY
..1. .... TRPDAT X'20' TRPDAT RESTRICT TO D.A.T.
MODE ONLY
...1 .... TRPNODAT X'10' TRPNODAT RESTRICT TO
NON-D.A.T. MODE ONLY
.... 1... TRPPRINT X'08' TRPPRINT SEND DISPLAY (IF
ANY) TO PRINTER
.... .1.. TRPTERM X'04' TRPTERM SEND DISPLAY (IF
ANY) TO TERMINAL
.... ..1. TRPNOSIM X'02' TRPNOSIM DELETE INSTRUCTION
SIMULATION
.... ...1 TRPHIT X'01' TRPHIT TRAP HAS DEFERRED
PROCESSING
0043 67 Bitstring 1 TRPCTL2
1... .... TRPIDSET X'80' TRPIDSET TRAP ID WAS SET
VIA 'ID' OPTION
.1.. .... TRPIDATP X'40' TRPIDATP INSTRUCTION DATA
PRESENT.
..1. .... TRPIASNF X'20' TRPIASNF TRPIASN contains
the ASN of an address space.
...1 .... TRPASNF X'10' TRPASNF TRPBASN or TRPSASN
contains the ASN of an address
space.
.... .1.. TRPESA X'04' TRPESA Trap is restricted
to ESA mode addr sp
.... ..1. TRPXC X'02' TRPXC Trap is restricted to
XC mode addr sp
.... ...1 TRPESAME X'01' TRPESAME Trap is restricted
to z/Arch addr sp Note regarding
TRPTYPE values: TRPTYPE bits 0-3
are commonly referenced as bits
(based on the HCPEQUAT values for
CR9B0). These bits are: CR9SUBR
X'80' Monitor Successful Branches
CR9IFET X'40' Monitor Instruction
Fetch CR9SALT X'20' Monitor
Storage Alterations CR9GPRS X'10'
Monitor Register Alterations
TRPTYPE bits 4-7 must be
referenced as CODES (defined
below).
0044 68 Bitstring 1 TRPTYPE TRACE TRAP TYPE DEFINITION
00000001 TRPINTCP 1 TRPINTCP TRACE OF INSTRUCTION
BY MNEMONIC
00000002 TRPSVC 2 TRPSVC SVC INSTRUCTION EVENT
TRAP
00000003 TRPDIAG 3 TRPDIAG DIAG INSTRUCTION EVENT
TRAP
00000004 TRPMCALL 4 TRPMCALL SUCCESSFUL MONITOR
CALL TRAP
00000005 TRPPGM 5 TRPPGM PROGRAM INTERRUPTION
EVENT TRAP
00000006 TRPEXT 6 TRPEXT EXTERNAL INTERRUPTION
EVENT TRAP
00000007 TRPMCH 7 TRPMCH MACHINE CHECK
INTERRUPTION EVENT TRAP
00000008 TRPIOACT 8 TRPIOACT I/O Activity Trap
00000009 TRPAIF 9 TRPAIF Adapter Interruption
Facility Trap
0045 69 Bitstring 1 TRPTYPE1 TRACE TRAP TYPE DEFINITION
1... .... TRPBAC X'80' TRPBAC
Branch-address-control
.... 1... TRPAR X'08' TRPAR ACCESS REGISTER
ALTERATION TRAP
.... .1.. TRPGG X'04' TRPGG GG REGISTER
ALTERATION TRAP
.... ..1. TRPGGDEF X'02' TRPGGDEF GG trap with no
MASK or DATA specified
.... 1... TRPIOINS X'08' TRPIOINS I/O Instructions
.... .1.. TRPIOINT X'04' TRPIOINT I/O Interruptions
(PSW FLIPS)
.... ..1. TRPIOCCW X'02' TRPIOCCW CCW CHAINS FOR
GIVEN DEVICE(S)
.... ...1 TRPIOINE X'01' TRPIOINE RSE extended byte
6 I/O OPCODE
.... 1... TRPSTFLE X'08' TRPSTFLE STFLE instruction
0046 70 Bitstring 1 TRPSFLAG STORAGE ALTERATION TRAP FLAG
1... .... TRPSPDAT X'80' TRPSPDAT STORAGE ALTERATION
DATA PRESENT
.1.. .... TRPS1ST X'40' TRPS1ST FIRST DATA SECTION
EQUAL LAST INT.
..1. .... TRPS2ND X'20' TRPS2ND SECOND DATA SECTION
EQUAL LAST INT
...1 .... TRPSLAST X'10' TRPSLAST BOTH SECTIONS
EQUAL LAST INTERRUPT
.... 1... TRPSDISP X'08' TRPSDISP DISPLAY THIS DATA
TRAP
.... .1.. TRPSPMAS X'04' TRPSPMAS STORAGE ALTERATION
MASK PRESENT (REFRESHES TRPSTOP
IF PRESENT) (ZERO IF NONE)
0047 71 Bitstring 1 TRPFLAG TRPBK flag byte
1... .... TRPIADSP X'80' TRPIADSP Trap is restricted
to instructions... fetched from a
specific addr space
.1.. .... TRPBADSP X'40' TRPBADSP Trap is restricted
to branch events... into a
specific address space
..1. .... TRPSADSP X'20' TRPSADSP Trap is restricted
to storage ... alterations in a
specific addr space
111. .... TRPADSP TRPIADSP+TRPSADSP+TRPBADSP
TRPADSP
...1 .... TRPIODDX X'10' TRPIODDX IODATA was
specified on TRACE cmd
0048 72 Dbl-Word 8 TRPOVRLY (11) OVERLAY REGION
For Instruction traps and Storage alteration traps, if the
DATA option is specified, the data will be stored in the
control block after the fields in the overlay region.
So, this control block could have up to 256 extra bytes
which contain data.
Overlay region for STANDARD (code range format)
trap information
TRPCLOWR/TRPCUPPR contain information that is
relative to the type of trace trap.
Trap type Information in TRPCLOWR/TRPCUPPR
--------- --------------------------------
mnemonic opcode
SVC SVC number range
DIAG Diagnose code range
MC Monitor call code range
EXT External interruption code range
PROG Program interruption code range
I/O Device range
0048 72 Bitstring 2 TRPCLOWR (0) range lower bound
0048 72 Bitstring 1 TRPCLWR0 TRPCLOWR byte 0
0049 73 Bitstring 1 TRPCLWR1 TRPCLOWR byte 1
004A 74 Bitstring 2 TRPCUPPR (0) range upper bound
004A 74 Bitstring 1 TRPCUPR0 TRPCUPPR byte 0
004B 75 Bitstring 1 TRPCUPR1 TRPCUPPR byte 1
004C 76 Signed 2 TRPDLOWR DEVICE LOWER BOUND
004E 78 Signed 2 TRPDUPPR DEVICE UPPER BOUND
0050 80 Signed 2 TRPIODNN IODATA byte limit for each CCW
0000000B TRPCDDBW (*-TRPBK+7)/8 NUMBER OF
DOUBLEWORDS
Here is the 'TRACE INSTRUCTION DATA' data area.
0052 82 Signed 2 TRPDATAL LENGTH OF 'TRACE INSTRUCTION'
DATA
00000054 TRPINLEN *-TRPBK FIXED PORTION OF
INSTRUCTION TRAP
0054 84 Character 256 TRPIDATA (0) 'TRACE INSTRUCTION' DATA
Overlay region for GPR and GG alteration trap
information
NOTES : The GPR and GG overlay listed below MUST match
the AR overlay EXACTLY in the use of the
fields and overlay displacements. In HCPCQE,
the GPR/GG overlay is used for ALL register
traps (including ARs).
NOTES : The range fields (TRPGGPRL and TRPGGPRU) must
remain adjacent to each other in this exact
way to they can be passed as input to the
FMTRANGE, or FMRANG8 subroutines in HCPCQE
via one register.
0048 72 Dbl-Word 8 TRPGGPRM (0) TR G/GG MASK value (64-bit)
0048 72 Signed 4 *
004C 76 Signed 4 TRPGPRM TR G/GG MASK value (32-bit)
0050 80 Dbl-Word 8 TRPGGPRL (0) Lower data bound (64-bit)
0050 80 Signed 4 *
0054 84 Signed 4 TRPGPRL Lower DATA bound (32-bit)
0058 88 Dbl-Word 8 TRPGGPRU (0) Upper data bound (64-bit)
0058 88 Signed 4 *
005C 92 Signed 4 TRPGPRU Upper DATA bound (32-bit)
0060 96 Signed 2 TRPGGPRS (0) GPR alteration bit mask
0060 96 Signed 2 TRPGPRS GPR alteration bit mask
0000000D TRPGRDBW (*-TRPBK+7)/8 NUMBER OF
DOUBLEWORDS
Overlay region for AR alteration trap information
NOTES : The AR overlay listed below MUST match the
GPR and GG overlay EXACTLY in the use of the
fields and overlay displacements. In HCPCQE,
the GPR/GG overlay is used for ALL register
traps (including ARs).
0048 72 Signed 4 * Reserved
004C 76 Signed 4 TRPARM MASK FOR ACCESS REGISTER DATA
COMPARE
0050 80 Signed 4 * Reserved MUST BE 0 FOR HCPCQE
0054 84 Signed 4 TRPARL LOWER DATA BOUND FOR AR
ALTERATION
0058 88 Signed 4 * Reserved MUST BE 0 FOR HCPCQE
005C 92 Signed 4 TRPARU UPPER BOUND FOR AR ALTERATION
0060 96 Signed 2 TRPARS MASK FOR ACCESS REGISTER
ALTERATION
0000000D TRPARDBW (*-TRPBK+7)/8 NUMBER OF
DOUBLEWORDS
Overlay region for BRANCH trap information
Notes : The TRPBSTO and TRPSSTO fields must always
have the same offset because HCPTRR refers
to both fields using TRPSSTO.
Notes : HCPTRR and HCPTGR contain DSECTS
for TRPBNEXT followed by TRPBRNG.
TRPBNEXT and TRPBRNG must be on doubleword
boundaries for the code to work correctly.
0048 72 Address 4 TRPBNEXT Link ptr for branch target range
004C 76 Signed 4 * Reserved
0050 80 Dbl-Word 8 TRPBRNG (2) BRANCH TRAP TARGET range
NOTE: The following 3 fields must remain in this
order so they can be passed as input to the
PUTADSP or FMTADSP subroutines in HCPCQE via
one register as follows:
GPR 7 = 31-BIT POINTER to address space info:
R7 -> DOUBLEWORD ASCE (TRPBASCE)
FULLWORD STO (TRPBSTO )
HALFWORD ASN (TRPBASN )
0060 96 Dbl-Word 8 TRPBASCE ASCE for address space of branch
range
0068 104 Signed 4 TRPBSTO SEGMENT TABLE ORIGN FOR ADDRESS
SPACE OF BRANCH TARGET RANGE
'FFFFFFFE': INDICATE LOGICAL
ADDRESS
006C 108 Signed 2 TRPBASN Address Space Number for the
subspace of BRANCH INTO range.
This field is only valid when the
TRPASNF bit is on.
0000000E TRPBRDBW (*-TRPBK+7)/8 NUMBER OF
DOUBLEWORDS
Overlay region for STORE (storage alteration)
trap information
Notes : HCPTRR and HCPTGR contain DSECTS
for TRPSNEXT followed by TRPSRNG.
TRPSNEXT and TRPSRNG must be on doubleword
boundaries for the code to work correctly.
0048 72 Address 4 TRPSNEXT LINK PTR FOR STORAGE RANGE
004C 76 Signed 4 * Reserved
0050 80 Dbl-Word 8 TRPSRNG (2) Store trap target range
NOTE: The following 3 fields must remain in this
order so they can be passed as input to the
PUTADSP or FMTADSP subroutines in HCPCQE via
one register as follows:
GPR 7 = 31-BIT POINTER to address space info:
R7 -> DOUBLEWORD ASCE (TRPSASCE)
FULLWORD STO (TRPSSTO )
HALFWORD ASN (TRPSASN )
0060 96 Dbl-Word 8 TRPSASCE ASCE for address space of store
range
0068 104 Signed 4 TRPSSTO SEGMENT TABLE ORIGN FOR ADDRESS
SPACE OF STORE RANGES 'FFFFFFFE':
INDICATE LOGICAL ADDRESS
006C 108 Signed 2 TRPSASN Address Space Number for the
subspace of STORE INTO range.
This field is only valid when the
TRPASNF bit is on
006E 110 Signed 2 * Reserved
TRPSASIT, TRPSPCID, and TRPXCFLG are used only for traps
set by an ESA/XC mode guest.
0070 112 Dbl-Word 8 TRPSASIT i-ASIT for STORE INTO range
0078 120 Character 33 TRPSPCID Spaceid for STORE INTO range of
0099 153 Bitstring 1 TRPXCFLG XC mode flag byte
1... .... TRPXCPRI X'80' TRPXCPRI This trap is
restricted to primary
.... 1... TRPXCCFY X'08' TRPXCCFY Used in HCPTRY to
indicate that this trap's i-ASIT
has been recertified
009A 154 Character 256 TRPSDATA (0) STORAGE ALTERATION DATA
0000009A TRPSTLEN *-TRPBK BASE LENGTH FOR STORE
TRAPS
Overlay for TRPIRNG
NOTES : The range fields must remain adjacent to each
other so they can be passed as input to the
FMTRANGE, FMTRANG4, or FMRANG8 subroutines in
HCPCQE via one register.
0020 32 Dbl-Word 8 TRPGIRANG LOWER IFETCH ADDRESS BOUNDS
0028 40 Dbl-Word 8 TRPGIRANH UPPER IFETCH ADDRESS BOUNDS
Overlay for TRPBRNG
NOTES : The range fields must remain adjacent to each
other so they can be passed as input to the
FMTRANGE, FMTRANG4, or FMRANG8 subroutines in
HCPCQE via one register.
0050 80 Dbl-Word 8 TRPGBRANG BRANCH TRAP TARGET LOWER RANGE
0058 88 Dbl-Word 8 TRPGBRANH BRANCH TRAP TARGET UPPER RANGE
Overlay for TRPSRNG
NOTES : The range fields must remain adjacent to each
other so they can be passed as input to the
FMTRANGE, FMTRANG4, or FMRANG8 subroutines in
HCPCQE via one register.
0050 80 Dbl-Word 8 TRPGSRANG STORE TRAP TARGET LOWER RANGE
0058 88 Dbl-Word 8 TRPGSRANH STORE TRAP TARGET UPPER RANGE
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