| |
Hex Dec Type/Val Lng Label (dup) Comments
---- ---- --------- ---- -------------- --------
0000 0 Structure RTEBK Region-Table Entry
RTEBK - 8 bytes, 64 bits
0000 0 Dbl-Word 8 RTEENTRY Entire region-table entry
64-bit mask X'FFFFFFFFFFFFF000'
00FFFFFF RTETOMH X'FFFFFFFF' Isolate table origin
(high word)
00FFF000 RTETOML X'FFFFF000' Isolate table origin
(low word)
64-bit mask X'FFFFFFFF80000000'
00FFFFFF RTERFAAH X'FFFFFFFF' Isolate RFAA (high
word)
.... .... RTERFAAL X'80000000' Isolate RFAA (low
word)
64-bit mask X'0000000000000200'
32-bit high X'00000000'
00000200 RTEPROTM X'00000200' Isolate region page
protect bit
64-bit mask X'0000000000000100'
32-bit high X'00000000'
R3TE EDAT-2 with FC=1
00000100 RTEIEPM X'00000100' Isolate execution
protection bit
64-bit mask X'00000000000000C0'
32-bit high X'00000000'
11.. .... RTETFMSK X'000000C0' Isolate table offset
bits
64-bit mask X'0000000000000020'
32-bit high X'00000000'
..1. .... RTEINVMK X'00000020' Isolate invalid bit
64-bit mask X'0000000000000010'
32-bit high X'00000000'
...1 .... RTENULMK X'00000010' Isolate null bit - CP
internal use only. See RTENBIT.
64-bit mask X'000000000000000C'
32-bit high X'00000000'
.... 11.. RTETTMSK X'0000000C' Isolate table type
bits
64-bit mask X'0000000000000003'
32-bit high X'00000000'
.... ..11 RTETLMSK X'00000003' Isolate table length
of region-second table or
region-third table or segment
table
00000002 RTETFNUM 2 Number of table-offset bits
00000002 RTETLNUM 2 Number of table-length bits
00000006 RTETFSHF 6 Offset of table-offset (TF)
field from right edge of RTE
00000006 RTETFBYT 6 Bits to shift TF to get number
of bytes from table origin to
actual start of table
0000000C RTETLBYT 12 Bits to shift (TL+1) to get
number of bytes from origin to
end of table
0000000B RTERXNUM 11 Number of bits in Rx index
0000000B RTESXNUM RTERXNUM Number of bits in
Segment index
000007FF RTERXRIT X'7FF' Mask to select a right-
justified RX
0000000B RTERFNUM RTERXNUM Number of bits in RFX
portion of virtual address
0000000B RTERSNUM RTERXNUM Number of bits in RSX
portion of virtual address
0000000B RTERTNUM RTERXNUM Number of bits in RTX
portion of virtual address
0000000B RTESNUM RTERXNUM Number of bits in SX
portion of virtual address
00000008 RTEPNUM 8 Number of bits in PX portion of
virtual address
1111 1111 RTEPXRIT X'FF' Mask to isolate a right-
justified PX
0000003E RTERFXTL 64-RTETLNUM Number of bits to
shift to convert between an
isolated RFX and the
corresponding RFTL. Also the
number of bits to shift to
convert between RFTL units and
addressable bytes.
00000033 RTERSXTL 64-RTERSNUM-RTETLNUM Number of
bits to shift to convert between
an isolated RSX and the
corresponding RSTL. Also the
number of bits to shift to
convert between RSTL units and
addressable bytes.
00000028 RTERTXTL 64-RTERFNUM-RTERSNUM-RTETLNUM
Number of bits to shift to
convert between an isolated RTX
and the corresponding RTTL. Also
the number of bits to shift to
convert between RTTL units and
addressable bytes.
0000001D RTESXSTL 64-RTERFNUM-RTERSNUM-RTERTNUM-RTE
TLNUM Number of bits to shift to
convert between an isolated SX
and the corresponding STL. Also
the number of bits to shift to
convert between STL units and
addressable bytes.
0000000B RTEFCLR RTERFNUM Number of bits to shift
out RFX portion of virtual
address, i.e. left-align RSX
00000016 RTEFSCLR RTERFNUM+RTERSNUM Number of bits
to shift out RFX and RSX portions
of virtual address, i.e.
left-align RTX
00000021 RTEFSTclr RTERFNUM+RTERSNUM+RTERTNUM Number
of bits to shift out RFX, RSX,
and RTX portions of virtual
address, i.e. left-align SX Note,
to right align RFX+RSX+RTX, shift
right 64-RTEFSTclr nbr of bits.
00000035 RTESHIFT 64-RTERXNUM Number of bits to
shift to right-align a
left-aligned Rx index
00000008 RTELENTH *-RTEENTRY Length of one RTE
00000003 RTESZSHF 3 Shift to multiply by size of an
RTE
The bit mask is built as far as certain bit lengths
are defined, then &NbrBitsInDWord 0s are added,
which brings us way beyond the bits in a dword.
Then the leftmost &NbrBitsInDWord are retained,
and split into Left and Right halves, because HLASM
does not do arithmetic beyond 32 bits.
64-bit mask to extract RFX+RSX+RTX+SX
00FFFFFF RTExFSTSH X'FFFFFFFF' High word RFX RSX RTX
SX
00F00000 RTExFSTSL X'FFF00000' Low word RFX RSX RTX
SX
64-bit mask to extract RFX+RSX+RTX
00FFFFFF RTExFSTH X'FFFFFFFF' High word RFX RSX RTX
.... .... RTExFSTL X'80000000' Low word RFX RSX RTX
64-bit mask to extract RFX+RSX
00FFFC00 RTExFSH X'FFFFFC00' High word RFX RSX
.... .... RTExFSL X'00000000' Low word RFX RSX
64-bit mask to extract RFX
00E00000 RTExRFXH X'FFE00000' High word
.... .... RTExRFXL X'00000000' Low word
64-bit mask to extract RSX
001FFC00 RTExRSXH X'001FFC00' High word
.... .... RTExRSXL X'00000000' Low word
64-bit mask to extract RTX
000003FF RTExRTXH X'000003FF' High word
.... .... RTExRTXL X'80000000' Low word
64-bit mask to extract SX
.... .... RTExSXH X'00000000' High word
00F00000 RTExSXL X'7FF00000' Low word
64-bit mask to extract PX
.... .... RTExPXH X'00000000' High word
000FF000 RTExPXL X'000FF000' Low word
0008 8 Dbl-Word 8 RTENEXT (0) Next RTE
0000 0 Signed 4 RTEW0 Word 0 of RTE
0004 4 Signed 4 RTEW1 Word 1 of RTE
0004 4 Bitstring 1 RTEW1B0 Word 1 Byte 0 of RTE
0005 5 Bitstring 1 RTEW1B1 Word 1 Byte 1 of RTE
.... ...1 RTEAV X'01' RTEAV ACCF Validity Control
Bit 47
0006 6 Bitstring 1 RTEW1B2 Word 1 Byte 2 of RTE
.... .1.. RTEFC X'04' RTEFC R3TE Format Control
(EDAT2 only) Bit 53
.... ..1. RTEPROT X'02' RTEPROT RTE Page Protection
bit (all RTE levels, EDAT1 only)
Bit 54
.... ...1 RTEIEP X'01' RTEIEP RTE Instruction
Execution Protection bit (RTE3
only, EDAT-2 only, FC=1) Bit 55
1111 .... RTEACC X'F0' RTEACC Access-Control Bits
Bits 48-51
.... 1... RTEF X'08' RTEF Fetch-Protect Bit 52
0007 7 Bitstring 1 RTEW1B3 Word 1 Byte 3 of RTE
table origin
Bit 52
0007 7 Bitstring 1 RTEFLAG RTE Flag Byte
.1.. .... RTETRANS X'40' RTE is in the process of
being validated. This bit is a
non-architected CP software
definition and is used to
serialize RTE validation. Note
that TMLL is used to test RTEIBIT
and RTENBIT at the same time.
This creates a dependency on
RETIBIT being to the left of and
in the same halfword as RTENBIT.
Bit 57
..1. .... RTEIBIT X'20' RTE is invalid. Bit 58
...1 .... RTECR X'10' Common-Region Bit Bit 59
...1 .... RTENBIT X'10' RTE is null and cannot be
validated. This bit is a
non-architected CP software
definition used to identify RTEs
representing non- addressable
storage. Bit 59
.... 11.. RTETTBTS X'0C' RTE table type bits
.... 11.. RTETTF X'0C' RTE is an RFT entry
.... 1... RTETTS X'08' RTE is an RST entry
.... .1.. RTETTT X'04' RTE is an RTT entry
.... .1.. RTETTUD X'04' RT type up/down incr/decr
value
z/Architecture Segment Table Entry format
z/Arch segment table entry contains no page table length
information. All page tables represent a
full megabyte of virtual storage (256 page table entries).
| |