About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
PCICONFG | Back to Index page |
Prolog Control Block Contents PCICONFG DSECT PCIHEADR DSECT PCICAPAB DSECT Storage Layout Cross Reference (Contains links to field and bit definitions) |
|
PCICONFG Control Block Content | Top of page |
|
PCICONFG Storage Layout | Top of page |
*** PCICONFG - PCIe Configuration Space * * +-------------------------------------------------------+ * 0 |///////////////////////////////////////////////////////| * =///////////////////////////////////////////////////////= * |///////////////////////////////////////////////////////| * +-------------------------------------------------------+ * 40 |///////////////////////////////////////////////////////| * =///////////////////////////////////////////////////////= * |///////////////////////////////////////////////////////| * +-------------------------------------------------------+ * 100 |///////////////////////////////////////////////////////| * =///////////////////////////////////////////////////////= * |///////////////////////////////////////////////////////| * +-------------------------------------------------------+ * 400 * *** PCICONFG - PCIe Configuration Space *** PCIHEADR - PCI Header * * +-------------+-------------+------+------+------+------+ * 0 | PCIEVID | PCIEDID |:ECMD1|:ECMD0|:ESTS1|:ESTS0| * +------+------+------+------+------+------+------+------+ * 8 |:ERID |PCIEPI|:ESCC |:EBCC |:ECLS |:EMLT |:EHTYP|:EBIST| * +------+------+------+------+------+------+------+------+ * 10 | PCIEBAR0 | PCIEBAR1 | * +---------------------------+---------------------------+ * 18 | PCIEBAR2 | PCIEBAR3 | * +---------------------------+---------------------------+ * 20 | PCIEBAR4 | PCIEBAR5 | * +---------------------------+-------------+-------------+ * 28 | PCIECCPT | PCIESSID | PCIESSVI | * +---------------------------+------+------+-------------+ * 30 | PCIEEROM |:ECAP |////////////////////| * +---------------------------+------+------+------+------+ * 38 |///////////////////////////|:EIPIN|:EILIN|:EMGNT|:EMLAT| * +---------------------------+------+------+------+------+ * 40 * *** PCIHEADR - PCI Header *** PCICAPAB - PCI Capability * * +------+------+ * 0 |:CAPID|:CAPNX| * +------+------+ * *** PCICAPAB - PCI Capability |
PCICONFG Cross Reference | Top of page |
Symbol Dspl Value -------------- ---- ----- CAPMSI 0000 05 CAPMSIX 0000 11 CAPPCIE 0000 10 CAPPMI 0000 01 PCICAP 0002 PCICAPID 0000 PCICAPNX 0001 PCICFGLN 0100 00000080 PCIEBAR0 0010 PCIEBAR1 0014 PCIEBAR2 0018 PCIEBAR3 001C PCIEBAR4 0020 PCIEBAR5 0024 PCIEBCC 000B PCIEBCCM 000B 01 PCIEBIST 000F PCIECAP 0034 PCIECBME 0004 04 PCIECC 0009 PCIECCPT 0028 PCIECFBE 0005 02 PCIECID 0005 04 PCIECIOS 0004 01 PCIECLS 000C PCIECMD 0004 PCIECMD0 0005 PCIECMD1 0004 PCIECMSE 0004 02 PCIECMWI 0004 10 PCIECPEE 0004 40 PCIECRSV 0005 F8 PCIECSCE 0004 08 PCIECSEE 0005 01 PCIECVGA 0004 20 PCIECZ77 0004 80 PCIEDID 0002 PCIEEROM 0030 PCIEHTYP 000E PCIEID 0000 PCIEILIN 003D PCIEINTR 003C PCIEIPIN 003C PCIEMGNT 003E PCIEMLAT 003F PCIEMLBA 0010 PCIEMLT 000D PCIEPI 0009 PCIEPINE 0009 02 PCIERID 0008 PCIESCC 000A PCIESCCN 000A 08 PCIESCL 0006 10 PCIESC66 0006 20 PCIESDEV 0007 06 PCIESDPD 0007 01 PCIESDPE 0007 80 PCIESFBC 0006 80 PCIESIS 0006 08 PCIESRMA 0007 20 PCIESRTA 0007 10 PCIESS 002C PCIESSID 002C PCIESSSE 0007 40 PCIESSTA 0007 08 PCIESSVI 002E PCIESTS 0006 PCIESTS0 0007 PCIESTS1 0006 PCIESZ20 0006 07 PCIESZ66 0006 40 PCIEVID 0000 PCIHDLEN 003F 00000008 |
Copyright IBM Corporation, 1990, 2022