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Hex Dec Type/Val Lng Label (dup) Comments
---- ---- --------- ---- -------------- --------
0000 0 Structure MWBK Multiple address space (MAS) Work area
control block
Guest Program Status Word (PSW).
0000 0 Bitstring 16 MWGPSW (0) Guest PSW (z/Arch guests)
0000 0 Dbl-Word 8 MWPSW (0) Guest PSW.
0000 0 Signed 4 MWPSW0F (0) Guest PSW bits 0-31
0000 0 Bitstring 1 MWPSW0 Guest PSW byte zero, syst. Mask
.1.. .... PSWPERA X'40' PSWPERA PROGRAM EVENT
RECORDING ACTIVE
.... .1.. PSWTRAN X'04' PSWTRAN ADDRESS TRANSLATE
MODE ACTIVE
.... ..1. PSWIOSM X'02' PSWIOSM I/O INTERRUPTION
SUMMARY MASK
.... ...1 PSWEXSM X'01' PSWEXSM EXTERNAL INTERRUPT
SUMMARY MASK
1111 11.. PSWIOMSK X'FC' PSWIOMSK CHANNEL MASK,
CHANNELS 0-5
.... ..1. PSWIOSMB X'02' PSWIOSMB I/O SUMMARY MASK,
CHANNEL 6-15
.... ...1 PSWEXSMB X'01' PSWEXSMB EXTERNAL INTERRUPT
SUMMARY MASK
0001 1 Bitstring 1 MWPSW1 Guest PSW byte one, KEY/EMWP
1111 .... PSWKEY X'F0' PSWKEY PSW ACCESS KEY
EXTRACTION MASK
.... 1... PSWECMD X'08' PSWECMD EXTENDED CONTROL
MODE ACTIVE
.... .1.. PSWMCHK X'04' PSWMCHK MACHINE CHECK
SUMMARY MASK
.... ..1. PSWWAIT X'02' PSWWAIT PROGRAM WAIT STATE
.... ...1 PSWPROB X'01' PSWPROB PROGRAM PROBLEM
STATE
.... ...1 PSWMAPPD X'01' PSWMAPPD For BC-mode PSWs
created by the 370 Accommodation
facility, this bit being set
indicates that the PSW is really
a "mapped" PSW. See HCPPSW.
0002 2 Signed 2 MWPSW2H (0) Guest BC PSW byte 2,3 Irpt code
0002 2 Bitstring 1 MWPSW2 Guest PSW byte two, EC mode
Secondary/Cond. Code/Pgm mask
11.. .... PSWASMSK X'C0' PSWASMSK ADDRESS SPACE
CONTROL MASK
11.. .... PSWHMODE X'C0' PSWHMODE HOME-SPACE MODE
1... .... PSWSMODE X'80' PSWSMODE SECONDARY MODE
.1.. .... PSWAMODE X'40' PSWAMODE ACCESS-REGISTER
MODE
..11 .... PSWCOND X'30' PSWCOND PSW CONDITION CODE
..1. .... PSWCOND2 X'20' PSWCOND2 PSW CONDITION CODE
BIT FOR CC=2,3
...1 .... PSWCOND1 X'10' PSWCOND1 PSW CONDITION CODE
BIT FOR CC=1,3
.... 1111 PSWPMSK X'0F' PSWPMSK FIXO+DECO+EXUN+SIGN
PROGRAM MASK
.... 1... PSWFIXO X'08' PSWFIXO FIXED-PT OVERFLOW
INTRPT MASK
.... .1.. PSWDECO X'04' PSWDECO DECIMAL OVERFLOW
INTRPT MASK
.... ..1. PSWEXUN X'02' PSWEXUN EXPONENT UNDERFLOW
INTRPT MASK
.... ...1 PSWSIGN X'01' PSWSIGN SIGNIFICANCE
INTERRUPT MASK
.... .... PSWPMODE X'00' PSWPMODE PRIMARY-SPACE MODE
0003 3 Bitstring 1 MWPSW3 Guest PSW byte three, or BC mode
interrupt code 8-15
0004 4 Signed 2 MWPSW4F (0) Guest EC instruction address
(S/370 bits 32-39 zero)
0004 4 Bitstring 1 MWPSW4 (0) Guest EC PSW byte four, Amode
1... .... PSW31BT X'80' PSW31BT 31-BIT LOGICAL
ADDRESSING MODE
1... .... PSWBA PSW31BT PSWBA Basic Addressing
Mode
.111 1111 PSWHIADR X'7F' PSWHIADR INSTRUCTION
COUNTER BITS 1-7 - MUST BE ZERO
IN 24-BIT MODE.
.... .... PSW31AMF X'80000000' PSW31AMF ADDRESS MODE
FULLWORD MASK - CORRESPONDS TO
PSW31BT
0004 4 Bitstring 1 MWPSW4B Guest BC PSW byte four,
ITL/CC/Program mask
11.. .... PSWILCBC X'C0' PSWILCBC INSTRUCTION LENGTH
CODE (ILC)
1... .... PSWILCB4 X'80' PSWILCB4 BC MODE ILC, 4
BYTE LENGTH
.1.. .... PSWILCB2 X'40' PSWILCB2 BC MODE ILC, 2
BYTE LENGTH
..11 .... PSWCONDB X'30' PSWCONDB PSW CONDITION CODE
..1. .... PSWCONB2 X'20' PSWCONB2 PSW CONDITION CODE
BIT FOR CC=2,3
...1 .... PSWCONB1 X'10' PSWCONB1 PSW CONDITION CODE
BIT FOR CC=1,3
.... 1111 PSWPMSKB X'0F' PSWPMSKB
FIXOB+DECOB+EXUNB+SIGNB PROGRAM
MASK
.... 1... PSWFIXOB X'08' PSWFIXOB FIXED-PT OVERFLOW
INTRPT MASK
.... .1.. PSWDECOB X'04' PSWDECOB DECIMAL OVERFLOW
INTRPT MASK
.... ..1. PSWEXUNB X'02' PSWEXUNB EXPONENT UNDERFLOW
INTRPT MASK
.... ...1 PSWSIGNB X'01' PSWSIGNB SIGNIFICANCE
INTERRUPT MASK Equate to define
the open storage key associated
with the Storage-Protection
Override facility
.... 1..1 KEYOPEN 9 KEYOPEN Access-control bits for
the open storage key. Equates for
storage key processing. May be
used to process storage key
information in ISKE/SSKE operand
format.
1111 .... KEYACC X'F0' KEYACC Storage key access
control
.... 1... KEYFETCH X'08' KEYFETCH Storage key
fetch-protection control
1111 1... KEYACCF KEYACC+KEYFETCH KEYACCF Storage
key access and fetch
.... .1.. KEYREF X'04' KEYREF Storage key
reference bit
.... ..1. KEYCHG X'02' KEYCHG Storage key change
bit
.... .11. KEYRC KEYREF+KEYCHG KEYRC Storage key
reference and change
1111 111. KEYISOL KEYACCF+KEYRC KEYISOL Isolate
entire 7 bit storage key Equates
for SSKE M3 mask field option
bits
.... 1... SSKENQ 8 SSKENQ SSKE Non-Quiescing
.... .1.. SSKEMR 4 SSKEMR SSKE Reference bit
update bypass
.... ..1. SSKEMC 2 SSKEMC SSKE Change bit update
bypass
.... ...1 SSKEMB 1 SSKEMB SSKE Multiple 4K blocks
!IC Codes used as operand to SAC
instruction
.... .... SACPRIM X'000' SACPRIM Primary-space mode
0MWPSW4B SACSECO X'100' SACSECO Secondary-space
mode
0MWPSW4B SACAR X'200' SACAR Access-register mode
0MWPSW4B SACHOME X'300' SACHOME Home-space mode
Codes used in register operand to
IDTE instruction
0MWPSW4B IDTEG2 X'2000' IDTEG2 IDTE G2
0MWPSW4B IDTECBA X'0800' IDTECBA
IDTE-clearing-by-ASCE Codes used
to locate instances of SAM* (Set
Address Mode) instructions SAM31
and SAM64 (used for cross
reference as HCPXREF operands)
...1 1111 SAM31 31 SAM31 Cross reference Set
Addressing Mode entry into 31-bit
addressing mode
.1.. .... SAM64 64 SAM64 Cross reference Set
Addressing Mode entry into 64-bit
addressing mode Equates to help
deal with virtual addresses.
0MWPSW4B DATSXM X'7FF00000' DATSXM Isolate
segment-index field of a virtual
address.
0MWPSW4B DATPXM X'000FF000' DATPXM Isolate
page-index field of a virtual
address.
0MWPSW4B DATBXM X'00000FFF' DATBXM Isolate
byte-index field of a virtual
address. Equates to use in NILL
instructions to convert one
64-bit address to another.
0MWPSW4B PTE2PTO X'F800' PTE2PTO Convert PTE addr
to PTO addr
0MWPSW4B PTE2PGM X'F000' PTE2PGM Convert PTE addr
to PGMBK addr
0MWPSW4B PTO2PGM X'F000' PTO2PGM Convert PTO addr
to PGMBK addr
0MWPSW4B STD2STO X'F000' STD2STO Convert STD addr
to STO addr
0MWPSW4B STE2STO X'F000' STE2STO Convert STE addr
to STO addr
0MWPSW4B STE2PTO X'F800' STE2PTO Convert STE
contents to PTO addr
0MWPSW4B STE2PGM X'F000' STE2PGM Convert STE
contents to PGMBK Equates to use
in NILF instructions to convert
one 64-bit address to another.
0MWPSW4B STE2SFAA X'FFF00000' STE2SFAA Convert
Format-1 STE contents to Segment
Frame Absolute Address Equates
related to access-list
designations.
0MWPSW4B ALD0ALOM X'7FFFFF80' ALD0ALOM Isolate
access-list origin
.111 1111 ALD0ALLM X'0000007F' ALD0ALLM Isolate
access-list length
.... ..11 ALD0ALNS 3 ALD0ALNS Bits to shift right an
ALEN to get the associated ALL
value.
1... .... ALD0ALUN 128 ALD0ALUN Number of bytes in
an "access-list unit", the number
of bytes in the smallest
variation of the size of an
access list.
.... .111 ALD0ALUS 7 ALD0ALUS Number of bits to
shift left in order to multiply
by ALD0ALUN.
1... .... ALDMIN ALD0ALUN ALDMIN Length of
smallest access list, in bytes.
0MWPSW4B ALDMAX 4096*4 ALDMAX Length of maximum
access list, in bytes. Equates
related to ASTEO-words:
0MWPSW4B ASWASTEOM X'7FFFFFC0' ASWASTEOM Isolate
ASTE origin Equates related to
DUCTO-words:
0MWPSW4B DUWDUCTOM X'7FFFFFC0' DUWDUCTOM Isolate
DUCT origin SIGP CODES
DEFINITIONS SIGNAL PROCESSOR
CODES
.... ...1 SIGPSENS 001 SIGPSENS SIGP SENSE
.... ..1. SIGPEXTC 002 SIGPEXTC SIGP EXTERNAL CALL
.... ..11 SIGPEMER 003 SIGPEMER SIGP EMERGENCY
SIGNAL
.... .1.. SIGPSTRT 004 SIGPSTRT SIGP START
.... .1.1 SIGPSTOP 005 SIGPSTOP SIGP STOP
.... .11. SIGPRSTR 006 SIGPRSTR SIGP RESTART
.... .111 SIGPIPR 007 SIGPIPR SIGP INITIAL PROGRAM
RESET
.... 1... SIGPPR 008 SIGPPR SIGP PROGRAM RESET
.... 1..1 SIGPSSTT 009 SIGPSSTT SIGP STOP AND STORE
STATUS
.... 1.11 SIGPICPU 011 SIGPICPU SIGP INITIAL CPU
RESET
.... 11.. SIGPCPU 012 SIGPCPU SIGP CPU RESET
.... 11.1 SIGPSPFX 013 SIGPSPFX SIGP SET PREFIX
.... 111. SIGPSSTS 014 SIGPSSTS SIGP STORE STATUS AT
ADDRESS
...1 ...1 SIGPSXST 017 SIGPSXST SIGP Store Extended
Status At Address
...1 ..1. SIGPSARC 018 SIGPSARC SIGP Set
Architecture
...1 .1.1 SIGPSRST 021 SIGPSRST SIGP Sense Running
STatus
...1 .11. SIGPSMT 022 SIGPSMT SIGP Set
Multi-threading
...1 .111 SIGPSASA 023 SIGPSASA SIGP Store
Additional Status at Address
0005 5 Bitstring 3 MWPSW57 Guest PSW byte 5,6,7 BC Instr.
address (370 guest only)
0008 8 Address 8 MWPSWIA Bytes 8:15 of guest PSW (z/Arch
instruction address)
Guest control registers
0010 16 Bitstring 128 MWGCRS (0) z/Arch Guest control regs 0-15.
0010 16 Dbl-Word 8 MWGCR0 (0) z/Arch Guest CR 0, 8 bytes
0010 16 Signed 4 MWCR0H z/Arch Guest CR 0, High 4 bytes
0014 20 Signed 4 MWCR0 (0) z/Arch Guest CR 0, Low 4 bytes
0014 20 Bitstring 1 MWCR0B0 MWCR0, byte 0
0015 21 Bitstring 1 MWCR0B1 MWCR0, byte 1
0016 22 Signed 2 MWCR0MX (0) z/Arch Guest CR 0 ext irpt mask
0016 22 Bitstring 1 MWCR0B2 MWCR0, byte 2
0017 23 Bitstring 1 MWCR0B3 MWCR0, byte 3
0018 24 Dbl-Word 8 MWGCR1 (0) z/Arch Guest CR 1, 8 bytes
0018 24 Signed 4 MWCR1H z/Arch Guest CR 1, High 4 bytes
001C 28 Signed 4 MWCR1 (0) z/Arch Guest CR 1, Low 4 bytes
001C 28 Bitstring 1 MWCR1B0 MWCR1, byte 0 370 guest segment
table length
1... .... CR1SSXA X'80' CR1SSXA 370/XA SPACE SWITCH
EVENT MASK
001D 29 Bitstring 3 MWCR1S0 (0) 370 guest STO value
001D 29 Bitstring 1 MWCR1B1 MWCR1, byte 1
001E 30 Bitstring 1 MWCR1B2 MWCR1, byte 2
001F 31 Bitstring 1 MWCR1B3 MWCR1, byte 3
.... ...1 CR1SS370 X'01' CR1SS370 370 SPACE SWITCH
EVENT MASK
0020 32 Dbl-Word 8 MWGCR2 (0) z/Arch Guest CR 2, 8 bytes
0020 32 Signed 4 MWCR2H z/Arch Guest CR 2, High 4 bytes
0024 36 Signed 4 MWCR2 (0) z/Arch Guest CR 2, Low 4 bytes
0024 36 Bitstring 1 MWCR2B0 MWCR2, byte 0
0025 37 Bitstring 1 MWCR2B1 MWCR2, byte 1
0026 38 Bitstring 1 MWCR2B2 MWCR2, byte 2
0027 39 Bitstring 1 MWCR2B3 MWCR2, byte 3
0028 40 Dbl-Word 8 MWGCR3 (0) z/Arch Guest CR 3, 8 bytes
0028 40 Signed 4 MWCR3H z/Arch Guest CR 3, High 4 bytes
002C 44 Signed 4 MWCR3 (0) z/Arch Guest CR 3, Low 4 bytes
002C 44 Signed 2 MWCR3KM (0) MWCR3, PKM
002C 44 Bitstring 1 MWCR3B0 MWCR3, byte 0
002D 45 Bitstring 1 MWCR3B1 MWCR3, byte 1
002E 46 Signed 2 MWCR3SA (0) MWCR3, SASN
002E 46 Bitstring 1 MWCR3B2 MWCR3, byte 2
002F 47 Bitstring 1 MWCR3B3 MWCR3, byte 3
0030 48 Dbl-Word 8 MWGCR4 (0) z/Arch Guest CR 4, 8 bytes
0030 48 Signed 4 MWCR4H z/Arch Guest CR 4, High 4 bytes
0034 52 Signed 4 MWCR4 (0) z/Arch Guest CR 4, Low 4 bytes
0034 52 Signed 2 MWCR4AX (0) MWCR4, AX
0034 52 Bitstring 1 MWCR4B0 MWCR4, byte 0
0035 53 Bitstring 1 MWCR4B1 MWCR4, byte 1
0036 54 Signed 2 MWCR4PA (0) MWCR4, PASN
0036 54 Bitstring 1 MWCR4B2 MWCR4, byte 2
0037 55 Bitstring 1 MWCR4B3 MWCR4, byte 3
0038 56 Dbl-Word 8 MWGCR5 (0) z/Arch Guest CR 5, 8 bytes
0038 56 Signed 4 MWCR5H z/Arch Guest CR 5, High 4 bytes
003C 60 Signed 4 MWCR5 (0) z/Arch Guest CR 5, Low 4 bytes
003C 60 Bitstring 1 MWCR5B0 MWCR5, byte 0
003D 61 Bitstring 1 MWCR5B1 MWCR5, byte 1
003E 62 Bitstring 1 MWCR5B2 MWCR5, byte 2
003F 63 Bitstring 1 MWCR5B3 MWCR5, byte 3
0040 64 Dbl-Word 8 MWGCR6 (0) z/Arch Guest CR 6, 8 bytes
0040 64 Signed 4 MWCR6H z/Arch Guest CR 6, High 4 bytes
0044 68 Signed 4 MWCR6 (0) z/Arch Guest CR 6, Low 4 bytes
0044 68 Bitstring 1 MWCR6B0 MWCR6, byte 0
0045 69 Bitstring 1 MWCR6B1 MWCR6, byte 1
0046 70 Bitstring 1 MWCR6B2 MWCR6, byte 2
0047 71 Bitstring 1 MWCR6B3 MWCR6, byte 3
0048 72 Dbl-Word 8 MWGCR7 (0) z/Arch Guest CR 7, 8 bytes
0048 72 Signed 4 MWCR7H z/Arch Guest CR 7, High 4 bytes
004C 76 Signed 4 MWCR7 (0) z/Arch Guest CR 7, Low 4 bytes
004C 76 Bitstring 1 MWCR7B0 MWCR7, byte 0
004D 77 Bitstring 1 MWCR7B1 MWCR7, byte 1
004E 78 Bitstring 1 MWCR7B2 MWCR7, byte 2
004F 79 Bitstring 1 MWCR7B3 MWCR7, byte 3
0050 80 Dbl-Word 8 MWGCR8 (0) z/Arch Guest CR 8, 8 bytes
0050 80 Signed 4 MWCR8H z/Arch Guest CR 8, High 4 bytes
0054 84 Signed 4 MWCR8 (0) z/Arch Guest CR 8, Low 4 bytes
0054 84 Signed 2 MWCR8AX Extended authority index
0056 86 Signed 2 MWCR8MM Monitor call event mask
0058 88 Dbl-Word 8 MWGCR9 (0) z/Arch Guest CR 6, 8 bytes
0058 88 Signed 4 MWCR9H z/Arch Guest CR 6, High 4 bytes
005C 92 Signed 4 MWCR9 (0) z/Arch Guest CR 6, Low 4 bytes
005C 92 Bitstring 1 MWCR9B0 MWCR9, byte 0
005D 93 Bitstring 1 MWCR9B1 MWCR9, byte 1
005E 94 Bitstring 1 MWCR9GM (2) P.E.R alteration mask
0060 96 Dbl-Word 8 MWGCR10 (0) z/Arch Guest CR 10, 8 bytes
0060 96 Signed 4 MWCR10H z/Arch Guest CR 10, High 4 bytes
0064 100 Signed 4 MWCR10 z/Arch Guest CR 10, Low 4 bytes
0068 104 Dbl-Word 8 MWGCR11 (0) z/Arch Guest CR 11, 8 bytes
0068 104 Signed 4 MWCR11H z/Arch Guest CR 11, High 4 bytes
006C 108 Signed 4 MWCR11 z/Arch Guest CR 11, Low 4 bytes
0070 112 Dbl-Word 8 MWGCR12 (0) z/Arch Guest CR 12, 8 bytes
0070 112 Signed 4 MWCR12H z/Arch Guest CR 12, High 4 bytes
0074 116 Signed 4 MWCR12 (0) z/Arch Guest CR 12, Low 4 bytes
0074 116 Bitstring 1 MWCRCB0 MWCR12, byte 0
1... .... CRCBRCTL X'80' CRCBRCTL BRANCH TRACE
CONTROL BIT. WHEN ON, BALR, BASR,
BASSM, BAKR AND BSG INST MAY BE
TRACED BY THE HARDWARE. Note that
for zArch, this bit is moved to
GCRC0.0 of a 64-bit CRC with a
label of CRCBTCTL.
0075 117 Bitstring 1 MWCRCB1 MWCR12, byte 1
0076 118 Bitstring 1 MWCRCB2 MWCR12, byte 2
0077 119 Bitstring 1 MWCRCB3 MWCR12, byte 3
0078 120 Dbl-Word 8 MWGCR13 (0) z/Arch Guest CR 13, 8 bytes
0078 120 Signed 4 MWCR13H z/Arch Guest CR 13, High 4 bytes
007C 124 Signed 4 MWCR13 (0) z/Arch Guest CR 13, Low 4 bytes
007C 124 Bitstring 1 MWCRDB0 MWCR13, byte 0
007D 125 Bitstring 1 MWCRDB1 MWCR13, byte 1
007E 126 Bitstring 1 MWCRDB2 MWCR13, byte 2
007F 127 Bitstring 1 MWCRDB3 MWCR13, byte 3
0080 128 Dbl-Word 8 MWGCR14 (0) z/Arch Guest CR 14, 8 bytes
0080 128 Signed 4 MWCR14H z/Arch Guest CR 14, High 4 bytes
0084 132 Signed 4 MWCR14 (0) z/Arch Guest CR 14, Low 4 bytes
0084 132 Bitstring 1 MWCREB0 MWCR14, byte 0
0085 133 Bitstring 1 MWCREB1 MWCR14, byte 1
0086 134 Bitstring 1 MWCREB2 MWCR14, byte 2
0087 135 Bitstring 1 MWCREB3 MWCR14, byte 3
0088 136 Dbl-Word 8 MWGCR15 (0) z/Arch Guest CR 15, 8 bytes
0088 136 Signed 4 MWCR15H z/Arch Guest CR 15, High 4 bytes
008C 140 Signed 4 MWCR15 (0) z/Arch Guest CR 15, Low 4 bytes
Machine check extended log addr
008C 140 Bitstring 1 MWCRFB0 MWCR15, byte 0
008D 141 Bitstring 1 MWCRFB1 MWCR15, byte 1
008E 142 Bitstring 1 MWCRFB2 MWCR15, byte 2
008F 143 Bitstring 1 MWCRFB3 MWCR15, byte 3
Guest general purpose registers
0090 144 Bitstring 128 MWGGRS (0) z/Arch Guest GPRs 0-15.
1..1 .1.. MWGPRH0 00002 MWGGRS+4,2 MWGGRS Low 4
bytes, halfword 0
1..1 .1.. MWGPRB0 00001 MWGGRS+4,1 MWGGRS Low 4
bytes, byte 0
1..1 .1.1 MWGPRB1 00001 MWGGRS+5,1 MWGGRS Low 4
bytes, byte 1
1..1 .11. MWGPRH1 00002 MWGGRS+6,2 MWGGRS Low 4
bytes, halfword 1
1..1 .11. MWGPRB2 00001 MWGGRS+6,1 MWGGRS Low 4
bytes, byte 2
1..1 .111 MWGPRB3 00001 MWGGRS+7,1 MWGGRS Low 4
bytes, byte 3
0090 144 Dbl-Word 8 MWGGR0 (0) z/Arch Guest GPR 0, 8 bytes
0090 144 Signed 4 MWGR0H z/Arch Guest GPR 0, High 4 bytes
0094 148 Signed 4 MWGPR0 z/Arch Guest GPR 0, Low 4 bytes
0098 152 Dbl-Word 8 MWGGR1 (0) z/Arch Guest GPR 1, 8 bytes
0098 152 Signed 4 MWGR1H z/Arch Guest GPR 1, High 4 bytes
009C 156 Signed 4 MWGPR1 z/Arch Guest GPR 1, Low 4 bytes
00A0 160 Bitstring 104 MWGGR214 (0) z/Arch Guest GPRs 2-14
00A0 160 Dbl-Word 8 MWGGR2 (0) z/Arch Guest GPR 2, 8 bytes
00A0 160 Signed 4 MWGR2H z/Arch Guest GPR 2, High 4 bytes
00A4 164 Signed 4 MWGPR2 z/Arch Guest GPR 2, Low 4 bytes
00A8 168 Dbl-Word 8 MWGGR3 (0) z/Arch Guest GPR 3, 8 bytes
00A8 168 Signed 4 MWGR3H z/Arch Guest GPR 3, High 4 bytes
00AC 172 Signed 4 MWGPR3 z/Arch Guest GPR 3, Low 4 bytes
00B0 176 Dbl-Word 8 MWGGR4 (0) z/Arch Guest GPR 4, 8 bytes
00B0 176 Signed 4 MWGR4H z/Arch Guest GPR 4, High 4 bytes
00B4 180 Signed 4 MWGPR4 z/Arch Guest GPR 4, Low 4 bytes
00B8 184 Dbl-Word 8 MWGGR5 (0) z/Arch Guest GPR 5, 8 bytes
00B8 184 Signed 4 MWGR5H z/Arch Guest GPR 5, High 4 bytes
00BC 188 Signed 4 MWGPR5 z/Arch Guest GPR 5, Low 4 bytes
00C0 192 Dbl-Word 8 MWGGR6 (0) z/Arch Guest GPR 6, 8 bytes
00C0 192 Signed 4 MWGR6H z/Arch Guest GPR 6, High 4 bytes
00C4 196 Signed 4 MWGPR6 z/Arch Guest GPR 6, Low 4 bytes
00C8 200 Dbl-Word 8 MWGGR7 (0) z/Arch Guest GPR 7, 8 bytes
00C8 200 Signed 4 MWGR7H z/Arch Guest GPR 7, High 4 bytes
00CC 204 Signed 4 MWGPR7 z/Arch Guest GPR 7, Low 4 bytes
00D0 208 Dbl-Word 8 MWGGR8 (0) z/Arch Guest GPR 8, 8 bytes
00D0 208 Signed 4 MWGR8H z/Arch Guest GPR 8, High 4 bytes
00D4 212 Signed 4 MWGPR8 z/Arch Guest GPR 8, Low 4 bytes
00D8 216 Dbl-Word 8 MWGGR9 (0) z/Arch Guest GPR 9, 8 bytes
00D8 216 Signed 4 MWGR9H z/Arch Guest GPR 9, High 4 bytes
00DC 220 Signed 4 MWGPR9 z/Arch Guest GPR 9, Low 4 bytes
00E0 224 Dbl-Word 8 MWGGR10 (0) z/Arch Guest GPR 10, 8 bytes
00E0 224 Signed 4 MWGR10H z/Arch Guest GPR 10, High 4 bytes
00E4 228 Signed 4 MWGPR10 z/Arch Guest GPR 10, Low 4 bytes
00E8 232 Dbl-Word 8 MWGGR11 (0) z/Arch Guest GPR 11, 8 bytes
00E8 232 Signed 4 MWGR11H z/Arch Guest GPR 11, High 4 bytes
00EC 236 Signed 4 MWGPR11 z/Arch Guest GPR 11, Low 4 bytes
00F0 240 Dbl-Word 8 MWGGR12 (0) z/Arch Guest GPR 12, 8 bytes
00F0 240 Signed 4 MWGR12H z/Arch Guest GPR 12, High 4 bytes
00F4 244 Signed 4 MWGPR12 z/Arch Guest GPR 12, Low 4 bytes
00F8 248 Dbl-Word 8 MWGGR13 (0) z/Arch Guest GPR 13, 8 bytes
00F8 248 Signed 4 MWGR13H z/Arch Guest GPR 13, High 4 bytes
00FC 252 Signed 4 MWGPR13 z/Arch Guest GPR 13, Low 4 bytes
0100 256 Bitstring 16 MWGGR45 (0) z/Arch Guest GPR 14_15 (sie xfer)
0100 256 Dbl-Word 8 MWGGR14 (0) z/Arch Guest GPR 14, 8 bytes
0100 256 Signed 4 MWGR14H z/Arch Guest GPR 14, High 4 bytes
0104 260 Signed 4 MWGPR14 z/Arch Guest GPR 14, Low 4 bytes
0108 264 Dbl-Word 8 MWGGR15 (0) z/Arch Guest GPR 15, 8 bytes
0108 264 Signed 4 MWGR15H z/Arch Guest GPR 15, High 4 bytes
010C 268 Signed 4 MWGPR15 z/Arch Guest GPR 15, Low 4 bytes
Guest access registers
0110 272 Bitstring 64 MWARS (0) Access registers
000MWARS MWARH0 00002 MWARS+0,2 Guest AR halfword
0
000MWARS MWARB0 00001 MWARS+0,1 Guest AR byte 0
000MWARS MWARB1 00001 MWARS+1,1 Guest AR byte 1
000MWARS MWARH1 00002 MWARS+2,2 Guest AR halfword
1
000MWARS MWARB2 00001 MWARS+2,1 Guest AR byte 2
000MWARS MWARB3 00001 MWARS+3,1 Guest AR byte 3
0110 272 Signed 4 MWAR0 Guest access register 0
0114 276 Signed 4 MWAR1 Guest access register 1
0118 280 Bitstring 52 MWAR214 (0) Guest access registers 2-14
0118 280 Signed 4 MWAR2 Guest access register 2
011C 284 Signed 4 MWAR3 Guest access register 3
0120 288 Signed 4 MWAR4 Guest access register 4
0124 292 Signed 4 MWAR5 Guest access register 5
0128 296 Signed 4 MWAR6 Guest access register 6
012C 300 Signed 4 MWAR7 Guest access register 7
0130 304 Signed 4 MWAR8 Guest access register 8
0134 308 Signed 4 MWAR9 Guest access register 9
0138 312 Signed 4 MWAR10 Guest access register 10
013C 316 Signed 4 MWAR11 Guest access register 11
0140 320 Signed 4 MWAR12 Guest access register 12
0144 324 Signed 4 MWAR13 Guest access register 13
0148 328 Signed 4 MWAR14 Guest access register 14
014C 332 Signed 4 MWAR15 Guest access register 15
First or Only
ASN-Second-Table Entry (ASTE)
Function :
The ASTE maps the storage associated with one entry
of an ASN-Second Table. The entry is used in ASN
and AR translation.
Notes : CR0.15 is the multiple address space control
bit. If set the ASTE length is 64 bytes;
otherwise, the length is 16 bytes. The
first 16 bytes are the same for both formats.
The ASTE is always 64 bytes for z/Arch guests.
0150 336 Dbl-Word 8 MWASTE (0) Alignment.
0150 336 Bitstring 64 MWASMAS (0) Map the contents of the ASN
Second Table Entry for 370-XA
system with MAS installed.
0150 336 Bitstring 16 MWASDAS (0) Map the contents of the ASN
Second Table Entry for system
with MAS not installed or for
system with MAS installed but the
MAS control bit is zero
(CR0.15=0).
0150 336 Address 4 MWASATO Authority-Table Origin
0154 340 Signed 2 MWASAX Authorization Index
0156 342 Signed 2 MWASATL Authority Table Length
0156 342 Bitstring 1 MWASATL_0 Byte 0 of MWASATL
0157 343 Bitstring 1 MWASATL_1 Byte 1 of MWASATL
.... ..1. MWASCA X'02' MWASCA Controlled ASN
.... ...1 MWASRA X'01' MWASRA Reusable ASN
0158 344 Address 8 MWASASCE Segment-Table Designation z/Arch
0158 344 Address 4 MWASSTD Segment-Table Designation
015C 348 Address 4 MWASLTD Linkage-Table Designation (ES390)
0160 352 Bitstring 48 * (0) MAS Extention
0160 352 Address 4 MWASALD Access-List Designation
0164 356 Address 4 MWASSN ASTE Sequence Number
0168 360 Address 4 MWASGLTD Linkage-Table Designation (z/Arch
guest) Reserved for ES/390 guest
016C 364 Signed 4 * Reserved for future use
0170 368 Bitstring 12 * Reserved for future use
017C 380 Signed 4 MWASIN ASTE Instance number z/Arch guest
Reserved for future use 390 guest
0180 384 Bitstring 12 * Reserved for future use
Note that we are usurping the last 4 bytes of the ASTE so
that HCPVAR can return to its caller both the ASTE and the
relevant LFTE so that the caller can check for the
"reusable LX" bit.
If the architecture ever changes to use those last 4 bytes
this would have to change.
Linkage-First-Table Entry (LFTE)
Function :
The LFTE maps the storage associated with an entry
of a Linkage-First Table. The entry is used in ASN
translation.
018C 396 Signed 4 MWLFTE (0)
018C 396 Bitstring 4 MWLFTE03 LFTE Bytes 0-3 zArch guest
Reserved for future use 390 guest
00000040 MWASLEN *-MWASTE Entry size in bytes
00000008 MWASSIZE (MWASLEN+7)/8 Size in doublewords
of the ASTE
Second
ASN-Second-Table Entry (ASTE)
Function :
The ASTE maps the storage associated with one entry
of an ASN-Second Table. The entry is used in ASN
and AR translation.
Notes 1: CR0.15 is the multiple address space control
bit. If set the ASTE length is 64 bytes;
otherwise, the length is 16 bytes. The
first 16 bytes are the same for both formats.
2: This second ASN Second Table Entry (which is
identical to the first one) is used in in-
struction simulation routines (e.g. LASP)
which require both Primary and Secondary
ASN translation.
0190 400 Dbl-Word 8 MWASTE2 (0) Alignment.
0190 400 Bitstring 64 MWASMAS2 (0) Map the contents of the ASN
Second Table Entry for 370-XA
system with MAS installed.
0190 400 Bitstring 16 MWASDAS2 (0) Map the contents of the ASN
Second Table Entry for system wit
not installed or for system with
installed but the MAS control bit
is zero (CR0.15=0).
0190 400 Address 4 MWASATO2 Authority-Table Origin
0194 404 Signed 2 MWASAX2 Authorization Index
0196 406 Signed 2 MWASATL2 Authority Table Length
0196 406 Bitstring 1 MWASATL2_0 Byte 0 of MWASATL2
0197 407 Bitstring 1 MWASATL2_1 Byte 1 of MWASATL2
.... ..1. MWASCA2 X'02' MWASCA2 Controlled ASN
.... ...1 MWASRA2 X'01' MWASRA2 Reusable ASN
0198 408 Address 8 MWASASC2 Segment-Table Designation z/Arch
0198 408 Address 4 MWASSTD2 Segment-Table Designation
019C 412 Address 4 MWASLTD2 Linkage-Table Designation (ES390)
01A0 416 Bitstring 48 * (0) MAS Extention
01A0 416 Address 4 MWASALD2 Access-List Designation
01A4 420 Address 4 MWASSN2 ASTE Sequence Number
01A8 424 Address 4 MWASGLT2 Linkage-Table Designation (z/Arch
guest) Reserved for ES/390 guest
01AC 428 Signed 4 * Reserved for future use
01B0 432 Bitstring 12 * Reserved for future use
01BC 444 Signed 4 MWASIN2 ASTE Instance number z/Arch guest
Reserved for future use 390 guest
01C0 448 Bitstring 12 * Reserved for future use
Note that we are usurping the last 4 bytes of the ASTE so
that HCPVAR can return to its caller both the ASTE and the
relevant LFTE so that the caller can check for the
"reusable LX" bit.
If the architecture ever changes to use those last 4 bytes
this would have to change.
Linkage-First-Table Entry (LFTE)
Function :
The LFTE maps the storage associated with an entry
of a Linkage-First Table. The entry is used in ASN
translation.
01CC 460 Signed 4 MWLFTE2 (0)
01CC 460 Bitstring 4 MWLFTE203 LFTE Bytes 0-3 zArch guest
Reserved for future use 390 guest
Dispatchable Unit Control Table (DUCT)
Function :
This area contains a single DUCT.
01D0 464 Bitstring 64 MWDUCT DUCT
Breaking-Event Address register (BEAR)
Function :
This area contains a single BEAR.
0210 528 Bitstring 8 MWBEAR BEAR
Scratch Space
0218 536 Signed 4 MWFLAGW (0) Word of Flag bits
0218 536 Bitstring 1 MWFLAG0 Byte 0 of Flags
.... .1.. MWF0L29 X'04' MWF0L29 LASP Operand 2
address bit 29
.... ..1. MWF0L30 X'02' MWF0L30 LASP Operand 2
address bit 30
.... ...1 MWF0L31 X'01' MWF0L31 LASP Operand 2
address bit 31 End of definition
0219 537 Bitstring 1 MWFLAG1 Byte 1 of Flags
021A 538 Bitstring 1 MWFLAG2 Byte 2 of Flags
021B 539 Bitstring 1 MWFLAG3 Byte 3 of Flags
021C 540 Signed 4 * Reserved for future use
0220 544 Bitstring 56 * Reserved for future use
00000258 MWBKLEN *-MWBK Size in bytes of the MWBK
0000004B MWBKSIZE (MWBKLEN+7)/8 Size in doublewords
of the MWBK
ASTE Redefinition areas
0150 336 Bitstring 1 MWASATB0 Byte 0
1... .... MWASINV X'80' MWASINV ASX-invalid bit,
Address space is not available
0151 337 Bitstring 2 * Bits 8 through 23 End of
definition
0153 339 Bitstring 1 MWASATB3 Byte 3
.... ..11 MWASATZE X'03' MWASATZE Bits must be zero
End of definition
0156 342 Bitstring 1 * Bits 0 through 7
0157 343 Bitstring 1 MWASTLB1 Byte 1
.... 1111 MWASTLZE X'0F' MWASTLZE Bits must be zero
End of definition
0158 344 Bitstring 1 MWASSTB0 Byte 0
1... .... MWASSTSS X'80' MWASSTSS Space-Switch-Event
Control
0159 345 Bitstring 3 * Bytes 1-3 End of definition
015C 348 Bitstring 1 MWASLTB0 Byte 0
1... .... MWASLTSL X'80' MWASLTSL Subsystem-Linkage
Control
015D 349 Bitstring 3 * Bytes 1-3 End of definition
0160 352 Bitstring 1 MWASALB0 Byte 0
1... .... MWASALSL X'80' MWASALSL Subsystem-Linkage
Control
0161 353 Bitstring 3 * Bytes 1-3 End of definition
Entry Table Entry
Function :
This structure maps the storage associated with one
entry of an entry table. The entries are used in the
program call (PC) instruction execution.
0190 400 Dbl-Word 8 MWETE (0) Alignment.
0190 400 Bitstring 32 MWETMAS (0) MAS entry table entry: MAS
installed and CR0.15='1'.
0190 400 Bitstring 16 MWETDAS (0) No-MAS entry table entry: MAS not
installed or CR0.15='0'.
0190 400 Signed 2 MWETAKM Authorization key mask.
0192 402 Signed 2 MWETASN Zero or target PASN.
0194 404 Signed 4 MWETAIP Amode, Instr. Address,
Problem-State-Bit.
0198 408 Signed 4 MWETPRM Parameter for called routine.
019C 412 Signed 4 MWETEKW (0) Word containing EKM field.
019C 412 Signed 2 MWETEKM Entry key mask (EKM).
019E 414 Signed 2 * Reserved for future use.
01A0 416 Bitstring 16 * (0) Mas extension.
01A0 416 Signed 4 MWETEKOF (0) For PSW key work.
01A0 416 Bitstring 1 MWETFLG Flag byte
1... .... MWETSTK X'80' MWETSTK Stacking PC
...1 .... MWETPKR X'10' MWETPKR Stacking PC replace
PSW key
.... 1... MWETPMR X'08' MWETPMR Stacking PC replace
PSW key mask
.... .1.. MWETEXR X'04' MWETEXR Stacking PC replace
eax
.... ..1. MWETE17 X'02' MWETE17 Stacking PC PSW bit
17
.... ...1 MWETSAS X'01' MWETSAS Stacking PC set
SASN to PASN End of definition
01A1 417 Bitstring 1 MWETKEY PSW key in bits 0:3
01A2 418 Signed 2 MWETEAX Extended authority index
01A4 420 Address 4 MWETAST ASTE address
01A8 424 Signed 4 * Reserved for future use
01AC 428 Signed 4 * Reserved for future use
0190 400 Address 8 MWETG64A Entry Instr addr if 64-bit
0190 400 Signed 4 * Reserved if 24/31-bit addr mode
0194 404 Signed 4 MWETGAIP Amode, Instr. Address, Problem-St
0198 408 Signed 2 MWETGAKM Authorization key mask.
019A 410 Signed 2 MWETGASN Zero or target PASN.
019C 412 Signed 4 MWETGEKW (0) Word containing EKM field.
019C 412 Signed 2 MWETGEKM Entry key mask (EKM).
019E 414 Signed 2 * Reserved for future use.
01A0 416 Bitstring 16 * (0) Mas extension.
01A0 416 Signed 4 MWETGEKF (0) For PSW key work.
01A0 416 Bitstring 1 MWETGFLG Flag byte
1... .... MWETGSTK X'80' MWETGSTK Stacking PC
.1.. .... MWETGEAM X'40' MWETGEAM Stacking PC entry
ext addr mode
...1 .... MWETGPKR X'10' MWETGPKR Stacking PC
replace PSW key
.... 1... MWETGPMR X'08' MWETGPMR Stacking PC
replace PSW key mask
.... .1.. MWETGEXR X'04' MWETGEXR Stacking PC
replace eax
.... ..1. MWETGE17 X'02' MWETGE17 Stacking PC PSW
bit 17
.... ...1 MWETGSAS X'01' MWETGSAS Stacking PC set
SASN to PASN End of definition
01A1 417 Bitstring 1 MWETGKEY PSW key in bits 0:3
01A2 418 Signed 2 MWETGEAX Extended authority index
01A4 420 Address 4 MWETGAST ASTE address
01A8 424 Address 8 MWETGPRM Entry parm 8 bytes
00000020 MWETLEN *-MWETE Entry size in bytes
00000004 MWETSIZE (MWETLEN+7)/8 Size in doublewords
of the ETE.
System/370 DAS Trace Table Entry (PC,PT,SSAR)
Function :
This structure maps the storage associated with one
entry of the S/370 Trace Table. The entries are used
in PC, PT, instruction simulations.
01B0 432 Dbl-Word 8 * (0) Alignment
01B0 432 Bitstring 32 MWTTE (0) Trace Table Entry
01B0 432 Bitstring 8 MWTTEPS (0) New PSW
01B0 432 Bitstring 2 * New PSW Bytes 0:1
01B2 434 Bitstring 1 MWTTEID ID PC - X'90' PT - X'A0' SSAR -
X'B0'
01B3 435 Bitstring 1 * New PSW Byte 3
01B4 436 Signed 4 MWTTEIC New PSW Bytes 4:7 (Instr Ctr)
01B8 440 Signed 2 MWTTENP New PASN
01BA 442 Signed 2 MWTTENS New SASN (PC,SSAR)
01BC 444 Signed 4 MWTTEGE (0) New GPR14 (PC)
01BC 444 Signed 2 MWTTEOP Old PASN (PT)
01BE 446 Signed 2 MWTTEOS Old SASN (SSAR)
01C0 448 Signed 4 * Zero
01C4 452 Bitstring 1 MWTTEPM Old Program Mask with B'10' ILC
01C5 453 Bitstring 1 MWTTECI CPU ID (From Location 795)
01C6 454 Signed 2 * Zero
01C8 456 Signed 4 MWTTEPC PC Number (PC)
01CC 460 Signed 4 MWTTECK Clock Value (TOD Bytes 3:6)
00000020 MWTTELN *-MWTTE TTE Length (must be 32
Bytes)
System/370-XA Trace Table Entries (PC,PT,PR,SSAR,BSG)
Function :
This structure maps the storage associated with one
entry of the S/370-XA Trace Table. The entries are
used in PC, PT, PR, BSG instruction simulations.
It may also be used for branch trace entries, such
as the one that BSG may create.
01B0 432 Signed 4 MWXTT0F (0) Start of Trace Entry
01B0 432 Bitstring 1 MWXTCOD Trace Entry Type code
00000000 MWXT24BR 0 MWXT24BR 24-bit branch
00000080 MWXT31BR X'80' MWXT31BR 31-bit branch.
Note - this is not really a code
value for MWXTCOD, because bits
1-7 may have any value. Bit 0
being on is the distinguishing
attribute for this type of entry.
00000010 MWXTSSA 16 MWXTSSA Set Secondary ASN
00000021 MWXTPC 33 MWXTPC Program Call (PC) basic
addr mode
00000022 MWXTPC64 34 MWXTPC64 Program Call (PC)
extn addr mode
00000023 MWXTPC642G 35 MWXTPC642G PC AMODE 64, return
address > 2G
00000031 MWXTPT 49 MWXTPT Program Transfer (PT)
with MWXTXCOD = b'xxxx0000'
00000031 MWXTPT32 49 MWXTPT32 Program Transfer (PT)
with MWXTXCOD = b'xxxx1000'
00000032 MWXTPT64 50 MWXTPT64 Program Transfer (PT)
with MWXTXCOD = b'xxxx1100'
00000032 MWXTPR 50 MWXTPR Program Return (PR)
with MWXTXCOD = b'xxxx0000'
00000032 MWXTPREB 50 MWXTPREB Program Return (PR)
with MWXTXCOD = b'xxxx0010'
00000032 MWXTPRBE 50 MWXTPRBE Program Return (PR)
with MWXTXCOD = b'xxxx1000'
00000032 MWXTPREE 50 MWXTPREE Program Return (PR)
with MWXTXCOD = b'xxxx1010'
00000033 MWXTPR63 51 MWXTPR63 Program Return (PR)
with MWXTXCOD = b'xxxx0011'
00000033 MWXTPR64 51 MWXTPR64 Program Return (PR)
with MWXTXCOD = b'xxxx1011'
00000033 MWXTPR36 51 MWXTPR36 Program Return (PR)
with MWXTXCOD = b'xxxx1100'
00000033 MWXTPRBB 51 MWXTPRBB Program Return (PR)
with MWXTXCOD = b'xxxx1110'
00000034 MWXTPRNZ 52 MWXTPRNZ Program Return (PR)
with MWXTXCOD = b'xxxx1111'
00000041 MWXTBSG 65 MWXTBSG Branch in Subspace
Group1 (BSG)
00000042 MWXTBSGE 66 MWXTBSGE Branch in Subspace
Group2 (BSG)
00000051 MWXTMSB1 81 MWXTMSB1 Mode switch branch
with MWXTXCOD = b'00100000'
00000051 MWXTMS2 81 MWXTMS2 Mode switch with
MWXTXCOD = b'00110000'
00000051 MWXTMSB3 81 MWXTMSB3 Mode switch branch
with MWXTXCOD = b'10100000'
00000051 MWXTMSB4 81 MWXTMSB4 Mode switch branch
with MWXTXCOD = b'10110000'
00000052 MWXTMS5 82 MWXTMS5 Mode switch with
MWXTXCOD = b'01100000'
00000052 MWXT64BR 82 MWXT64BR Branch in 64-bit mode
when top 33 bits are not all
zeroes
00000052 MWXTMSB6 82 MWXTMSB6 Mode switch branch
with MWXTXCOD = b'11110000' End
of Definition
01B1 433 Bitstring 3 MWXTALET (0) ALET bits 7 and 9-31 (BSG)
01B1 433 Bitstring 1 MWXTKEY PSW Key
01B1 433 Bitstring 1 MWXTXCOD 1st 4 bits of this byte contain..
further definition of the trace..
entry type. Used in conjunction
with MXWTCOD to identify the
trace entry type. (Sometimes the
first 4 bits are significant and
sometimes the last 4 are used.)
Bit combinations defined in
MXWTXCOD
11.. .... MWXTXC0 X'C0' bits b'11000000'
.... 1111 MWXTX0F X'0F' bits b'00001111'
.... 111. MWXTX0E X'0E' bits b'00001110'
.... 11.. MWXTX0C X'0C' bits b'00001100'
.... 1.11 MWXTX0B X'0B' bits b'00001011'
.... 1.1. MWXTX0A X'0A' bits b'00001010'
.... 1... MWXTX08 X'08' bits b'00001000'
.... ..11 MWXTX03 X'03' bits b'00000011'
.... ..1. MWXTX02 X'02' bits b'00000010'
01B2 434 Signed 2 MWXTASN New PASN (PT,PR) or SASN (SSAR)
or PC number
01B4 436 Bitstring 8 MWXTBRAD 64-bit branch address
01B4 436 Signed 4 MWXTPSW1 (0) New PSW word 1 (BSG)
01B4 436 Signed 4 MWXTAIP AMode,IC,Problem (PC,PR,PT)
01B8 440 Signed 4 MWXTNSI New Sequential Instruction (PR)
01BC 444 Signed 4 MWXTUIA (2) Updated instruction address
01BC 444 Signed 4 MWXTUIA1 Updated instruction addr (word1)
01C0 448 Signed 4 MWXTUIA2 Updated instruction addr (word2)
End of the definition of the
trace entry
01C4 452 Signed 4 MWXTLEN Place to save the length of...
the entry that has been built
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