SXLBK DSECT
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Hex   Dec Type/Val   Lng Label (dup)    Comments
---- ---- --------- ---- -------------- --------
0000    0 Structure      SXLBK          Distributed shared-exclusive spinlock.
0000    0 Signed       4 SXLLOCKS       Mask of shares held of
                                        distributed shared- exclusive
                                        spinlocks. Values are defined in
                                        HCPEQUAT.
0004    4 Signed       2 SXLCPUAD       CPU addr assigned to SXLBK.
0006    6 Bitstring    1 SXLCPUTY       CPU type of the processor.
0007    7 Bitstring    1 SXLFLAGS       Flags.
          1... ....      SXLCPUOF       X'80' SXLCPUOF Assigned CPU is
                                        offline.
          .1.. ....      SXLWASON       X'40' SXLWASON Processor was
                                        online at some point since IPL.
0008    8 Signed       8 SXLTIME        TOD value at the time of the
                                        transition to the current state
                                        which is either online or
                                        offline.
0010   16 Bitstring   64 SXLMALFM       Mask of all CPUs that have
                                        malfunctioned (this is the OR of
                                        SYSMALFM and PFXMALFM)
          00000050       SXLBUSED       (*-SXLBK) Size of used SXLBK
                                        space.
0050   80 Bitstring  176 SXLBRSVD       Reserved for IBM use.
          00000020       SXLBKSZD       (*-SXLBK+7)/8 Size in double
                                        words.
          00000100       SXLBKSZB       SXLBKSZD*8 Size in bytes.


 SXLEN DSECT
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Hex   Dec Type/Val   Lng Label (dup)    Comments
---- ---- --------- ---- -------------- --------
0000    0 Structure      SXLEN          Distributed shared-exclusive spinlock.
      An SXLEN maps the processor local data area for a
      specific distributed shared-exclusive spinlock. It
      maintains a processors view of its lock hold state,
      contains the processor's lock usage statistics, and
      control data for using the lock.
      The SXLEN resides in an array of SXLENs with origin
      in PFXSXLEN. The SXLENs are indexed by the constant
      lock number value assigned to the lock corresponding
      to the bit position of the lock in the SXLLOCKS mask.
      Constants are defined in HCPEQUAT for the index values.
          00000001       SXLENMAX       SXLTOPLKI Maximum SXLEN entry
                                        number.
          00000000       SXLENSCO       SXLSCHLKI*SXLENSZB Offset of the
                                        Scheduler Lock SXLEN in an SXLEN
                                        array.
          00000200       SXLENTPO       SXLTOPLKI*SXLENSZB Offset of the
                                        Topology Lock SXLEN in an SXLEN
                                        array.
0000    0 Signed       4 SXLEMASK       This lock's SXLLOCKS mask value.
0004    4 Address      4 SXLEXLAD       Address of global data area for
                                        managing exclusive hold.
0008    8 Address      4 SXLEBKAD       Address of this processor's SXLBK
                                        for managing this processor's
                                        share of the lock.
000C   12 Signed       2 SXLENOFF       Offset into this processor's
                                        SXLEN array corresponding to its
                                        index position, SXLENNDX.
000E   14 Bitstring    1 SXLENNDX       This lock's SXLEN index value
                                        which is the bit position in
                                        SXLENMSK.
000F   15 Bitstring    1 SXLECTRL       Control settings.
          1... ....      SXLASSST       X'80' SXLASSST Assist used when
                                        1.
          .1.. ....      SXLNIAI2       X'40' SXLNIAI2 NIAI-2 used when
                                        1.
          ..1. ....      SXLNIAI4       X'20' SXLNIAI4 NIAI-4 used when
                                        1.
          ...1 ....      SXLNIAI8       X'10' SXLNIAI8 NIAI-7/8 used when
                                        1.
          .... 1...      SXLCAD         X'08' SXLCAD CAD used when 1.
                                        Only set if SXLPFD6 is also set.
          .... .1..      SXLPFD6        X'04' SXLPFD6 PFD-6/7 used when
                                        1.
          .... ..1.      SXLPPA14       X'02' SXLPPA14 PPA-14 used when
                                        1.
          .... ...1      SXLPPA15       X'01' SXLPPA15 PPA-15 used when
                                        1.
0010   16 Bitstring   40 SXLESTAT (0)   Local lock state info.
0010   16 Bitstring    1 SXLEFLB1       Lock specific flag byte 1.
          1... ....      SXLEXCL        X'80' SXLEXCL Attempting to
                                        acquire or currently holding
                                        exclusive.
          .1.. ....      SXLSHRD        X'40' SXLSHRD Attempting to
                                        acquire or currently holding a
                                        share.
          ..1. ....      SXLSH2EX       X'20' SXLSH2EX Attempting
                                        transition from shared to
                                        exclusive.
          ...1 ....      SXLEX2SH       X'10' SXLEX2SH Attempting
                                        transition from exclusive to
                                        shared.
          .... 1...      SXLSHPND       X'08' SXLSHPND This processor set
                                        SXLXLSPD.
          .... ....      SXLEFAVL       X'00' SXLEFAVL Available. Not
                                        held or pending.
0011   17 Bitstring    1 SXLEFLB2       Flags for HCPSXL usage.
          1... ....      SXLESPIN       X'80' SXLESPIN DSPOLICY=SPIN
                                        specified.
          .1.. ....      SXLESQR0       X'40' SXLESQR0 DSPOLICY=RETURN
                                        with SQR=0 specified.
          ..1. ....      SXLESQRN       X'20' SXLESQRN DSPOLICY=RETURN
                                        with SQR<>0 specifi
          ...1 ....      SXLESPDX       X'10' SXLESPDX Exclusive was last
                                        blocked by share-pending, not
                                        excl.
          .... 1...      SXLETRAC       X'08' SXLETRAC TRACE requested
                                        flag. Used by HCPSXLAX and
                                        HCPSXLAS.
          .... .1..      SXLEEPND       X'04' SXLEEPND Exclusive pending.
                                        SXLXLHLD is set in SXLXL but
                                        share scan is needed.
          .... ..1.      SXLELKSQ       X'02' SXLELKSQ LOCKSEQ>0
                                        processing.
          .... ...1      SXLESKLK       X'01' SXLESKLK Skipped
                                        speculative setting of SXLLOCKS
                                        for share acquisition.
0012   18 Signed       2 SXLESTSQ       Sequence number at start of
                                        attempt to acquire the lock.
0014   20 Bitstring    1 SXLEFLAGS      Lock flags.
          1... ....      SXLLKSEQ       X'80' SXLLKSEQ LOCKSEQ is
                                        exploited.
0015   21 Bitstring    1 *              Reserved for IBM use.
0016   22 Signed       2 SXLETARG       Target CPU address blocking
                                        serialization acquisition. Used
                                        by HCPSXLFT.
0018   24 Dbl-Word     8 *              Reserved for IBM use.
0020   32 Dbl-Word     8 SXLEREQR (0)   Must be dword aligned.
0020   32 Address      4 SXLEHLDA       Lock holder's address.
0024   36 Address      4 SXLEVMDA       Lock holding VMDBK address.
0028   40 Dbl-Word     8 SXLERELR (0)   Must be dword aligned.
0028   40 Address      4 SXLERELA       Lock releaser's address.
002C   44 Address      4 SXLEVMRA       Lock releaser VMDBK address.
0030   48 Signed       8 SXLETOD        TOD savearea for calculating
                                        interval durations. End of
                                        SXLESTAT.
0038   56 Dbl-Word     8 *              Reserved for IBM use.
      REQUEST COUNTS:
        Request counts are reported in mutually exclusive
        counts for each request type so that the sum of the
        individual counts indicates the overall request rate
        for that request type and method.
        For an rm value, the sum of the CU, CN and CSA values
        provided for that request type and method provides the
        total request count.  The CSX, CSP and CSS values
        provide details for the reasons for the spin, but the
        sum of those is likely to be greater than the CSA value
        because an exclusive request might wait because of an
        exclusive hold, or share-pending, but then also wait
        because of shares.
        The total share requests is the sum of the total for the
        rm values SC, SL and SU. For exclusive, sum XC and XU.
        Various subtotals are meaningful and referred to below:
          Ctot - total requests.
          Ltot - total lock acquisitions (CN + CSA).
          Stot - total lock spins. Normally CSA, but for
                 rm = SL, Stot = CU + CSA because the CU
                 value represents the number of spins started,
                 but cancelled before the lock was acquired.
        Comparing the relative percentages of the Ctot values
        across rm values provides indications of which request
        types and modifiers are most common.
        Counts of unsuccessful conditional lock requests.
        These values are used to determine the failure rates of
        conditional lock requests.
        - for rm = SC, XC, and SX:
          %failure = 100*CU/Ctot
        - for rm = SL (internal spin loop might have been
          cancelled)
          %failure = 100*CU/Ctot
0040   64 Dbl-Word     8 SXLESCCU       Count of unsuccessful share
                                        requests with DSPOLICY=RETURN but
                                        LOCKSEQ was not specified.
0048   72 Dbl-Word     8 SXLESLCU       Count of unsuccessful share
                                        requests with DSPOLICY=RETURN and
                                        LOCKSEQ but the invoker cancelled
                                        the spin before the share was
                                        acquired.
0050   80 Dbl-Word     8 SXLEXCCU       Count of unsuccessful exclusive
                                        requests with DSPOLICY=RETURN.
0058   88 Dbl-Word     8 SXLESXCU       Count of unsuccessful SHR2EX
                                        requests (promote).
        Counts of successful lock acquisitions not requiring a
        spin.
        Ltot(rm = SC, XC, XS and SX) = CN
           because those request types don't spin.
        These values are used with the spin counts to determine
        Ltot and collision rates for rm = SL, SU and XU which
        are request types that can spin. See the next section.
0060   96 Dbl-Word     8 SXLESCCN       Count of shares acquired by
                                        requests with DSPOLICY=RETURN but
                                        LOCKSEQ was not specified.
0068  104 Dbl-Word     8 SXLESLCN       Count of shares acquired by
                                        requests with DSPOLICY=RETURN and
                                        LOCKSEQ that did not require a
                                        spin in the invoker.
0070  112 Dbl-Word     8 SXLESUCN       Count of shares acquired by
                                        requests with DSPOLICY=SPIN that
                                        did not require a spin.
0078  120 Dbl-Word     8 SXLEXCCN       Count of exclusive acquisitions
                                        by requests with DSPOLICY=RETURN.
0080  128 Dbl-Word     8 SXLEXUCN       Count of exclusive acquisitions
                                        by requests with DSPOLICY=SPIN
                                        that did not require a spin.
0088  136 Dbl-Word     8 SXLESXCN       Count of SHR2EX requests that
                                        successfully promoted from a
                                        share to exclusive.
0090  144 Dbl-Word     8 SXLEXSCN       Count of EX2SHR requests that
                                        successfully demoted from an
                                        exclusive to share.
        Counts of lock requests that spun trying to acquire the
        lock for any reason. Incremented once per lock
        acquisition that spins for one or multiple reasons.
        Ltot(rm = SL, SU, and XU) = CN + CSA
           because those request types spin.
        Lock collision rates as a percentage of total
        acquisitions
           100*CSA/Ltot
        Lock collision rates as a percentage of total requests
           100*Stot/Ctot
0098  152 Dbl-Word     8 SXLESLCSA      Count of shares acquired by
                                        requests with DSPOLICY=RETURN and
                                        LOCKSEQ that required a spin in
                                        the invoker for any reason.
00A0  160 Dbl-Word     8 SXLESUCSA      Count of shares acquired by
                                        requests with DSPOLICY=SPIN that
                                        required a spin for any reason.
00A8  168 Dbl-Word     8 SXLEXUCSA      Count of exclusive acquisitions
                                        by requests with DSPOLICY=SPIN
                                        that required a spin for any
                                        reason.
        Counts of lock requests that spun for a specific reason
        during lock acquisition. Incremented once per request
        that spins for that specific reason.
        Collision rates for specific reasons can be calculated
        using these values in place of the CSA values.
00B0  176 Dbl-Word     8 SXLESLCSX      Count of shares acquired by
                                        requests with DSPOLICY=RETURN and
                                        LOCKSEQ that required a spin in
                                        the invoker to wait for exclusive
                                        to be released.
00B8  184 Dbl-Word     8 SXLESUCSX      Count of shares acquired by
                                        requests with DSPOLICY=SPIN that
                                        required a spin to wait for
                                        exclusive to be released.
00C0  192 Dbl-Word     8 SXLEXUCSX      Count of exclusive acquisitions
                                        by requests with DSPOLICY=SPIN
                                        that required a spin to wait for
                                        exclusive to be released.
00C8  200 Dbl-Word     8 SXLEXUCSP      Count of exclusive acquisitions
                                        by requests with DSPOLICY=SPIN
                                        that required a spin to wait
                                        because share-pending was set.
00D0  208 Dbl-Word     8 SXLEXUCSS      Count of exclusive acquisitions
                                        by requests with DSPOLICY=SPIN
                                        that required a spin to wait for
                                        one or more shares to be
                                        released.
        Spin times when the lock was not immediately available.
        These values accumulate time only when the request is
        spinning for the specified condition.
        STIMtot = Total spin time for all share requests is the
        sum of the TSX and TSU values for SL and SU rm values
        because it should include spin time for cancelled spins.
        STIMtot(rm = SL) = TSX + TSU
        STIMtot(rm = SU) = TSX
        STIMtot = Total spin time for exclusive acquisitions is
        SUM of the TSX, TSP and TSS values for the XU rm value.
        STIMtot(rm = XU) = TSX + TSP + TSS
        Average spin time = STIMtot/Stot.
        Spin % busy can be calculated from the STIMtot values.
        Average spin time and spin % busy can also be calculated
        for the individual spin conditions for exclusive.
00D8  216 Signed       8 SXLESLTSU      Time spent spinning on share
                                        requests with DSPOLICY=RETURN and
                                        LOCKSEQ after beginning a spin in
                                        the invoker but ending the spin
                                        before the share was acquired.
00E0  224 Signed       8 SXLESLTSX      Time spent spinning on share
                                        requests with DSPOLICY=RETURN and
                                        LOCKSEQ that required a spin in
                                        the invoker to wait for exclusive
                                        to be released.
00E8  232 Signed       8 SXLESUTSX      Time spent spinning on share
                                        requests with DSPOLICY=SPIN that
                                        required a spin to wait for
                                        exclusive to be released.
00F0  240 Signed       8 SXLEXUTSX      Portion of time acquiring
                                        exclusive with DSPOLICY=SPIN
                                        spent spinning waiting for an
                                        exclusive hold to be released.
00F8  248 Signed       8 SXLEXUTSP      Portion of time acquiring
                                        exclusive with DSPOLICY=SPIN
                                        spent spinning waiting for
                                        share-pending to be removed.
0100  256 Signed       8 SXLEXUTSS      Portion of time acquiring
                                        exclusive with DSPOLICY=SPIN
                                        spent spinning waiting for shares
                                        to be released.
        Share-pending usage statistics.
        In general, the higher the ratio of PO/PS, the better
        because it represents efficient usage. A ratio value
        near or below the number of processors is reasonable.
        When calculating the ratio, use the sum of the PO and
        sum of the PS values.
0108  264 Dbl-Word     8 SXLESUPS       Count of times share-pending was
                                        set to acquire a share excluding
                                        LOCKSEQ spins.
0110  272 Dbl-Word     8 SXLESLPS       Count of times share-pending was
                                        set to acquire a share during a
                                        LOCKSEQ spin.
0118  280 Dbl-Word     8 SXLESLPR       Count of times share-pending was
                                        removed in a LOCKSEQ spin after
                                        previously setting it without
                                        acquiring a share.
0120  288 Dbl-Word     8 SXLESCPO       Count of times share-pending was
                                        set when acquiring a conditional
                                        share acquisition excluding
                                        LOCKSEQ spin.
0128  296 Dbl-Word     8 SXLESLPO       Count of times share-pending was
                                        observed when getting a share
                                        during a LOCKSEQ spin.
0130  304 Dbl-Word     8 SXLESUPO       Count of times share-pending was
                                        observed during an unconditional
                                        share acquisition.
        Shares observed during exclusive acquisition.
        The ratio SO/CSS is the average number of shares for
        which an exclusive request had to wait while spinning on
        shares.  The value will be greater than 1, but is not
        expected to be a lot higher because while the exclusive
        request is waiting for the first share, other processors
        are in the process of finishing up their holds as well.
0138  312 Dbl-Word     8 SXLEXUSO       Number of CPUs observed holding
                                        shares while attempting to
                                        acquire the lock exclusive.
        Exclusive requests observed during lock acquisition.
        The ratio XO/CSX for an rm value is the average number
        of exclusive acquisitions by other processors that occur
        while the rm type requests are blocked by exclusive
        hold. The higher the ratios, the more likely the ratio
        CSX/Ltot is high. A high CSX/Ltot ratio would be closer
        to 1, while a high XO/CSX ratio would be higher than 2.
        These ratios can be calculated for rm = SL, SU and XU.
0140  320 Dbl-Word     8 SXLESLXO       The number of exclusive lock
                                        acquisitions that occurred while
                                        other requests spun getting a
                                        share in HCPDSP using its local
                                        spin.
0148  328 Dbl-Word     8 SXLESUXO       The number of exclusive lock
                                        acquisitions that occurred while
                                        other requests spun getting a
                                        share excluding HCPDSP local
                                        spin.
0150  336 Dbl-Word     8 SXLEXUXO       The number of exclusive lock
                                        acquisitions that occurred while
                                        other requests spun getting
                                        exclusive.
0158  344 Signed       4 SXLECADS       Count of CAD instructions for
                                        shared lock requests.
015C  348 Signed       4 SXLECADX       Count of CAD instructions for
                                        exclusive lock requests.
0160  352 Bitstring   24 SXLEXSLX       LOCKSEQ share requests blocked by
                                        exclusive.
0178  376 Bitstring   24 SXLEXSUX       Unconditional share requests
                                        blocked by exclusive.
0190  400 Bitstring   24 SXLEXXUX       Exclusive requests blocked by
                                        exclusive.
01A8  424 Bitstring   24 SXLEXXUP       Exclusive requests blocked by
                                        share-pending.
01C0  448 Bitstring   24 SXLEXXUS       Exclusive requests blocked by
                                        CPUs holding shares.
          000001D8       SXLEUSED       (*-SXLEN) Size of used SXLEN
                                        space.
01D8  472 Bitstring   40 SXLERSVD       Reserved for IBM use.
          00000040       SXLENSZD       (*-SXLEN+7)/8 Size in double
                                        words.
          00000200       SXLENSZB       SXLENSZD*8 Size in bytes.
      SXLEX maps each of the four SXLEXxxx elements in the SXLEN.


 SXLEX DSECT
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Hex   Dec Type/Val   Lng Label (dup)    Comments
---- ---- --------- ---- -------------- --------
0000    0 Structure      SXLEX          Distributed shared-exclusive spinlock.
0000    0 Signed       4 SXLEX9T        Count of attempts to identify a
                                        diagnose x'9C' target.
0004    4 Signed       4 SXLEX9S        Count of potential targets
                                        considered (for which a SIGP SRS
                                        was performed).
0008    8 Signed       4 SXLEX9F        Count of times target was found.
000C   12 Signed       4 SXLEX9C        Count of Diag x'9C's issued.
0010   16 Signed       4 SXLEX44        Count of Diag x'44's issued.
0014   20 Signed       4 *              Reserved for IBM use.
          00000018       SXLEXSZB       *-SXLEX Size in bytes.
      SXLXL maps the eXclusive Lock data in the global area.


 SXLXL DSECT
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Hex   Dec Type/Val   Lng Label (dup)    Comments
---- ---- --------- ---- -------------- --------
0000    0 Structure      SXLXL          Distributed shared-exclusive spinlock.
0000    0 Dbl-Word     8 SXLXLOCK (0)   Exclusive lock state.
0000    0 Signed       4 SXLXLWD1 (0)   Word 1 of lock state.
          SXLXLWD1       SXLAVLW1       X'0000FFFF' SXLAVLW1 Available
                                        for exclusive value for word 1 of
                                        lock.
0000    0 Bitstring    1 SXLXLFLG       Exclusive lock flags.
          1... ....      SXLXLHLD       X'80' SXLXLHLD Exclusive held.
          .1.. ....      SXLXLSPD       X'40' SXLXLSPD Share pending.
          11.. ....      SXLXLNAV       X'C0' SXLXLNAV Flags making lock
                                        not available.
          .... ....      SXLXLAVL       X'00' SXLXLAVL Available. Not
                                        held or pending.
0001    1 Bitstring    1 *              Reserved for IBM use.
0002    2 Signed       2 SXLXLCPU       CPU address of processor with
                                        hold or pending hold. Set to
                                        X'FFFF' when not held.
          0000FFFF       SXLNOCPU       X'FFFF' Indicates no CPU hold the
                                        lock.
0004    4 Signed       4 SXLXLWD2 (0)   Word 2 of lock state.
0004    4 Signed       2 SXLXLSEQ       Exclusive obtain sequence num.
                                        Incremented at time of release.
          00010000       SXLSQINC       X'00010000' Constant used to
                                        increment the sequence number by
                                        1.
0006    6 Signed       2 SXLXLCPS       CPU address of processor with
                                        pending share. Set to X'FFFF'
                                        when not pending.
0008    8 Address      4 SXLXLENO       SXLEN offset in a processor'
                                        SXLEN array. Add to PFXSXLEN to
                                        calculate the address.
000C   12 Signed       4 SXLXLMSK       This lock's SXLLOCKS mask value.
0010   16 Address      4 SXLXBKST       Address of SXLBK array origin.
0014   20 Signed       2 SXLXLSQT       Sequence number increase
                                        threshold for setting pending
                                        share (SXLXLSPD).
0016   22 Signed       2 SXLXLSQTL      Sequence number increase
                                        threshold for setting pending
                                        share (SXLXLSPD). for use with
                                        LOCKSEQ.
          00000003       SXLTHRESH      3 Default SXLXSQT and SXLXSQTL
                                        value.
0018   24 Dbl-Word     8 *              Reserved for IBM use.
          00000004       SXLXLSZD       (*-SXLXL+7)/8 Size in double
                                        words.
          00000020       SXLXLSZB       SXLXLSZD*8 Size in bytes.
       SXLSW is a redefinition of the PFXTMPSG SVGWRK area for
       use by HCPSXL and that macros that call its entry points.
       All invokers of the macros must have PFXTMPSG available
       for use by the macros and potential calls to HCPSXL.
       The macros and HCPSXL share the usage of this area with
       some areas for use by the macros and expected to have
       been set before calls to HCPSXL.
       This area is used by setting up usage as:
         HCPUSING SXLSW,PFXTMPSG+(SVGWRK-SVGBK),PFXPG


 SXLSW DSECT
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Hex   Dec Type/Val   Lng Label (dup)    Comments
---- ---- --------- ---- -------------- --------
0000    0 Structure      SXLSW          Distributed shared-exclusive spinlock.
0000    0 Dbl-Word     8 * (0)          PFXTMPSG.SVGWRK0
0000    0 Signed       4 SXLSR14H       Macro R14 highhalf savearea.
0004    4 Signed       4 SXLSR15H       Macro R15 highhalf savearea.
0008    8 Dbl-Word     8 * (0)          PFXTMPSG.SVGWRK1
0008    8 Dbl-Word     8 SXLSR0SV       Macro GR0 savearea.
0010   16 Dbl-Word     8 * (0)          PFXTMPSG.SVGWRK2
0010   16 Signed       4 SXLFTPRT (0)   Footprint state.
0010   16 Bitstring    1 SXLSCTRL       Cached copy of SXLECTRL.
0011   17 Bitstring    1 SXLFTPTX       Footprint of X error checks.
          1... ....      SXLFTXFM       X'80' SXLFTXFM Exclusive
                                        acquisition check of SXLEFLB1
                                        successful (macro).
          .1.. ....      SXLFTXPM       X'40' SXLFTXPM Exclusive
                                        acquisition check of SXLXLCPS
                                        successful (macro).
          ..1. ....      SXLFTXFA       X'20' SXLFTXFA Exclusive
                                        acquisition check of SXLEFLB1
                                        successful (HCPSXL).
          ...1 ....      SXLFTXXC       X'10' SXLFTXXC Exclusive
                                        acquisition check of SXLXLCPU
                                        successful (HCPSXL).
          .... 1...      SXLFTXPA       X'08' SXLFTXPA Exclusive
                                        acquisition check of SXLXLCPS
                                        successful (HCPSXL).
0012   18 Bitstring    1 SXLFTPSM       Footprint of S error checks.
          1... ....      SXLFTSFM       X'80' SXLFTSFM Shared acquisition
                                        check 1 of SXLEFLB1 successful
                                        (macro).
          .1.. ....      SXLFTSFN       X'40' SXLFTSFN Shared acquisition
                                        check 2 of SXLEFLB1 successful
                                        (macro).
          ..1. ....      SXLFTSL1       X'20' SXLFTSL1 Shared acquisition
                                        check 1 of SXLLOCKS successful
                                        (macro).
          ...1 ....      SXLFTSL2       X'10' SXLFTSL2 Shared acquisition
                                        check 2 of SXLLOCKS successful
                                        (macro).
          .... 1...      SXLFTSL3       X'08' SXLFTSL3 Shared acquisition
                                        check 3 of SXLLOCKS successful
                                        (macro).
          .... .1..      SXLFTSL4       X'04' SXLFTSL4 Shared acquisition
                                        check 4 of SXLLOCKS successful
                                        (macro).
0013   19 Bitstring    1 SXLFTPSA       Footprint of S error checks.
          1... ....      SXLFTSFA       X'80' SXLFTSFA Shared acquisition
                                        check of SXLEFLB1 successful
                                        (HCPSXL).
          .1.. ....      SXLFTSL5       X'40' SXLFTSL5 Shared acquisition
                                        check 5 of SXLLOCKS successful
                                        (HCPSXL).
          ..1. ....      SXLFTSXC       X'20' SXLFTSXC Shared acquisition
                                        check of SXLXLCPU successful
                                        (HCPSXL).
          ...1 ....      SXLFTSP1       X'10' SXLFTSP1 Shared acquisition
                                        check 1 of SXLXLCPS successful
                                        (HCPSXL).
          .... 1...      SXLFTSP2       X'08' SXLFTSP2 Shared acquisition
                                        check 2 of SXLXLCPS successful
                                        (HCPSXL).
          .... .1..      SXLFTSP3       X'04' SXLFTSP3 Shared acquisition
                                        check 3 of SXLXLCPS successful
                                        (HCPSXL).
0014   20 Signed       4 *              Reserved for IBM use. These are
                                        ordered old and then new to allow
                                        STMG after the CSG as long as it
                                        uses consecutive registsers as R1
                                        and R3.
0018   24 Dbl-Word     8 * (0)          PFXTMPSG.SVGWRK3
0018   24 Dbl-Word     8 SXLLKOBS       Last observed SXLXLOCK value. For
                                        passing value to HCPSXLAX, old
                                        value after successful CSG, when
                                        acquiring a share, etc.
0020   32 Dbl-Word     8 * (0)          PFXTMPSG.SVGWRK4
0020   32 Dbl-Word     8 SXLLKNEW       SXLXLOCK CSG new value. Also
                                        value at time of last checked for
                                        share obtains.
0028   40 Dbl-Word     8 * (0)          PFXTMPSG.SVGWRK5
0028   40 Dbl-Word     8 SXLTRSV1       Trace EP register savearea 1.
0030   48 Dbl-Word     8 * (0)          PFXTMPSG.SVGWRK6
0030   48 Dbl-Word     8 SXLFNDRT       FINDUDSH return address
0038   56 Dbl-Word     8 * (0)          PFXTMPSG.SVGWRK7
0038   56 Bitstring    1 SXLPSWMSK      Save/restore byte for PSW bits
                                        0-7 at the Malfunction Alert
                                        Window
0039   57 Bitstring    1 *              Reserved for IBM use.
003A   58 Signed       2 SXLDWOFF       count for SXLLK macro loop
                                        control. This count increments by
                                        8 to align with each DW of a
                                        bitmask that is MAXVMPRC in
                                        length
003C   60 Signed       4 SXLCR0         Save/restore area for CR0 at the
                                        Malfunction Alert Window

          
*** SXLBK - Distributed shared-exclusive spinlock.
*
*     +---------------------------+-------------+------+------+
*   0 |         SXLLOCKS          |  SXLCPUAD   |:CPUTY|:FLAGS|
*     +---------------------------+-------------+------+------+
*   8 |                       SXLTIME                         |
*     +-------------------------------------------------------+
*  10 |                                                       |
*     =                       SXLMALFM                        =
*     |                                                       |
*     +-------------------------------------------------------+
*  50 |                                                       |
*     =                       SXLBRSVD                        =
*     |                                                       |
*     +-------------------------------------------------------+
* 100
*
*** SXLBK - Distributed shared-exclusive spinlock.
          
*** SXLEN - Distributed shared-exclusive spinlock.
*
*     +---------------------------+---------------------------+
*   0 |         SXLEMASK          |         SXLEXLAD          |
*     +---------------------------+-------------+------+------+
*   8 |         SXLEBKAD          |  SXLENOFF   |:ENNDX|:ECTRL|
*     +------+------+-------------+------+------+------+------+
*  10 |:EFLB1|:EFLB2|  SXLESTSQ   |(014) |//////|  SXLETARG   |
*     +------+------+-------------+------+------+-------------+
*  18 |///////////////////////////////////////////////////////|
*     +---------------------------+---------------------------+
*  20 |         SXLEHLDA          |         SXLEVMDA          |
*     +---------------------------+---------------------------+
*  28 |         SXLERELA          |         SXLEVMRA          |
*     +---------------------------+---------------------------+
*  30 |                       SXLETOD                         |
*     +-------------------------------------------------------+
*  38 |///////////////////////////////////////////////////////|
*     +-------------------------------------------------------+
*  40 |                       SXLESCCU                        |
*     +-------------------------------------------------------+
*  48 |                       SXLESLCU                        |
*     +-------------------------------------------------------+
*  50 |                       SXLEXCCU                        |
*     +-------------------------------------------------------+
*  58 |                       SXLESXCU                        |
*     +-------------------------------------------------------+
*  60 |                       SXLESCCN                        |
*     +-------------------------------------------------------+
*  68 |                       SXLESLCN                        |
*     +-------------------------------------------------------+
*  70 |                       SXLESUCN                        |
*     +-------------------------------------------------------+
*  78 |                       SXLEXCCN                        |
*     +-------------------------------------------------------+
*  80 |                       SXLEXUCN                        |
*     +-------------------------------------------------------+
*  88 |                       SXLESXCN                        |
*     +-------------------------------------------------------+
*  90 |                       SXLEXSCN                        |
*     +-------------------------------------------------------+
*  98 |                      SXLESLCSA                        |
*     +-------------------------------------------------------+
*  A0 |                      SXLESUCSA                        |
*     +-------------------------------------------------------+
*  A8 |                      SXLEXUCSA                        |
*     +-------------------------------------------------------+
*  B0 |                      SXLESLCSX                        |
*     +-------------------------------------------------------+
*  B8 |                      SXLESUCSX                        |
*     +-------------------------------------------------------+
*  C0 |                      SXLEXUCSX                        |
*     +-------------------------------------------------------+
*  C8 |                      SXLEXUCSP                        |
*     +-------------------------------------------------------+
*  D0 |                      SXLEXUCSS                        |
*     +-------------------------------------------------------+
*  D8 |                      SXLESLTSU                        |
*     +-------------------------------------------------------+
*  E0 |                      SXLESLTSX                        |
*     +-------------------------------------------------------+
*  E8 |                      SXLESUTSX                        |
*     +-------------------------------------------------------+
*  F0 |                      SXLEXUTSX                        |
*     +-------------------------------------------------------+
*  F8 |                      SXLEXUTSP                        |
*     +-------------------------------------------------------+
* 100 |                      SXLEXUTSS                        |
*     +-------------------------------------------------------+
* 108 |                       SXLESUPS                        |
*     +-------------------------------------------------------+
* 110 |                       SXLESLPS                        |
*     +-------------------------------------------------------+
* 118 |                       SXLESLPR                        |
*     +-------------------------------------------------------+
* 120 |                       SXLESCPO                        |
*     +-------------------------------------------------------+
* 128 |                       SXLESLPO                        |
*     +-------------------------------------------------------+
* 130 |                       SXLESUPO                        |
*     +-------------------------------------------------------+
* 138 |                       SXLEXUSO                        |
*     +-------------------------------------------------------+
* 140 |                       SXLESLXO                        |
*     +-------------------------------------------------------+
* 148 |                       SXLESUXO                        |
*     +-------------------------------------------------------+
* 150 |                       SXLEXUXO                        |
*     +---------------------------+---------------------------+
* 158 |         SXLECADS          |         SXLECADX          |
*     +---------------------------+---------------------------+
* 160 |                                                       |
*     =                       SXLEXSLX                        =
*     |                                                       |
*     +-------------------------------------------------------+
* 178 |                                                       |
*     =                       SXLEXSUX                        =
*     |                                                       |
*     +-------------------------------------------------------+
* 190 |                                                       |
*     =                       SXLEXXUX                        =
*     |                                                       |
*     +-------------------------------------------------------+
* 1A8 |                                                       |
*     =                       SXLEXXUP                        =
*     |                                                       |
*     +-------------------------------------------------------+
* 1C0 |                                                       |
*     =                       SXLEXXUS                        =
*     |                                                       |
*     +-------------------------------------------------------+
* 1D8 |                                                       |
*     =                       SXLERSVD                        =
*     |                                                       |
*     +-------------------------------------------------------+
* 200
*
*** SXLEN - Distributed shared-exclusive spinlock.
          
*** SXLEX - Distributed shared-exclusive spinlock.
*
*     +---------------------------+---------------------------+
*   0 |         SXLEX9T           |         SXLEX9S           |
*     +---------------------------+---------------------------+
*   8 |         SXLEX9F           |         SXLEX9C           |
*     +---------------------------+---------------------------+
*  10 |         SXLEX44           |///////////////////////////|
*     +---------------------------+---------------------------+
*  18
*
*** SXLEX - Distributed shared-exclusive spinlock.
          
*** SXLXL - Distributed shared-exclusive spinlock.
*
*     +------+------+-------------+-------------+-------------+
*   0 |:XLFLG|//////|  SXLXLCPU   |  SXLXLSEQ   |  SXLXLCPS   |
*     +------+------+-------------+-------------+-------------+
*   8 |         SXLXLENO          |         SXLXLMSK          |
*     +---------------------------+-------------+-------------+
*  10 |         SXLXBKST          |  SXLXLSQT   | SXLXLSQTL   |
*     +---------------------------+-------------+-------------+
*  18 |///////////////////////////////////////////////////////|
*     +-------------------------------------------------------+
*  20
*
*** SXLXL - Distributed shared-exclusive spinlock.
          
*** SXLSW - Distributed shared-exclusive spinlock.
*
*     +---------------------------+---------------------------+
*   0 |         SXLSR14H          |         SXLSR15H          |
*     +---------------------------+---------------------------+
*   8 |                       SXLSR0SV                        |
*     +------+------+------+------+---------------------------+
*  10 |:SCTRL|:FTPTX|:FTPSM|:FTPSA|///////////////////////////|
*     +------+------+------+------+---------------------------+
*  18 |                       SXLLKOBS                        |
*     +-------------------------------------------------------+
*  20 |                       SXLLKNEW                        |
*     +-------------------------------------------------------+
*  28 |                       SXLTRSV1                        |
*     +-------------------------------------------------------+
*  30 |                       SXLFNDRT                        |
*     +------+------+-------------+---------------------------+
*  38 |(038) |//////|  SXLDWOFF   |          SXLCR0           |
*     +------+------+-------------+---------------------------+
*  40
*
*** SXLSW - Distributed shared-exclusive spinlock.

 
Symbol         Dspl Value
-------------- ---- -----
SXLASSST       000F 80
SXLAVLW1       0000 SXLXLWD1
SXLBKSZB       0050 00000100
SXLBKSZD       0050 00000020
SXLBRSVD       0050
SXLBUSED       0010 00000050
SXLCAD         000F 08
SXLCPUAD       0004
SXLCPUOF       0007 80
SXLCPUTY       0006
SXLCR0         003C
SXLDWOFF       003A
SXLEBKAD       0008
SXLECADS       0158
SXLECADX       015C
SXLECTRL       000F
SXLEEPND       0011 04
SXLEFAVL       0010 00
SXLEFLAGS      0014
SXLEFLB1       0010
SXLEFLB2       0011
SXLEHLDA       0020
SXLELKSQ       0011 02
SXLEMASK       0000
SXLENMAX       0000 00000001
SXLENNDX       000E
SXLENOFF       000C
SXLENSCO       0000 00000000
SXLENSZB       01D8 00000200
SXLENSZD       01D8 00000040
SXLENTPO       0000 00000200
SXLERELA       0028
SXLERELR       0028
SXLEREQR       0020
SXLERSVD       01D8
SXLESCCN       0060
SXLESCCU       0040
SXLESCPO       0120
SXLESKLK       0011 01
SXLESLCN       0068
SXLESLCSA      0098
SXLESLCSX      00B0
SXLESLCU       0048
SXLESLPO       0128
SXLESLPR       0118
SXLESLPS       0110
SXLESLTSU      00D8
SXLESLTSX      00E0
SXLESLXO       0140
SXLESPDX       0011 10
SXLESPIN       0011 80
SXLESQRN       0011 20
SXLESQR0       0011 40
SXLESTAT       0010
SXLESTSQ       0012
SXLESUCN       0070
SXLESUCSA      00A0
SXLESUCSX      00B8
SXLESUPO       0130
SXLESUPS       0108
SXLESUTSX      00E8
SXLESUXO       0148
SXLESXCN       0088
SXLESXCU       0058
SXLETARG       0016
SXLETOD        0030
SXLETRAC       0011 08
SXLEUSED       01C0 000001D8
SXLEVMDA       0024
SXLEVMRA       002C
SXLEXCCN       0078
SXLEXCCU       0050
SXLEXCL        0010 80
SXLEXLAD       0004
SXLEXSCN       0090
SXLEXSLX       0160
SXLEXSUX       0178
SXLEXSZB       0014 00000018
SXLEXUCN       0080
SXLEXUCSA      00A8
SXLEXUCSP      00C8
SXLEXUCSS      00D0
SXLEXUCSX      00C0
SXLEXUSO       0138
SXLEXUTSP      00F8
SXLEXUTSS      0100
SXLEXUTSX      00F0
SXLEXUXO       0150
SXLEXXUP       01A8
SXLEXXUS       01C0
SXLEXXUX       0190
SXLEX2SH       0010 10
SXLEX44        0010
SXLEX9C        000C
SXLEX9F        0008
SXLEX9S        0004
SXLEX9T        0000
SXLFLAGS       0007
SXLFNDRT       0030
SXLFTPRT       0010
SXLFTPSA       0013
SXLFTPSM       0012
SXLFTPTX       0011
SXLFTSFA       0013 80
SXLFTSFM       0012 80
SXLFTSFN       0012 40
SXLFTSL1       0012 20
SXLFTSL2       0012 10
SXLFTSL3       0012 08
SXLFTSL4       0012 04
SXLFTSL5       0013 40
SXLFTSP1       0013 10
SXLFTSP2       0013 08
SXLFTSP3       0013 04
SXLFTSXC       0013 20
SXLFTXFA       0011 20
SXLFTXFM       0011 80
SXLFTXPA       0011 08
SXLFTXPM       0011 40
SXLFTXXC       0011 10
SXLLKNEW       0020
SXLLKOBS       0018
SXLLKSEQ       0014 80
SXLLOCKS       0000
SXLMALFM       0010
SXLNIAI2       000F 40
SXLNIAI4       000F 20
SXLNIAI8       000F 10
SXLNOCPU       0002 0000FFFF
SXLPFD6        000F 04
SXLPPA14       000F 02
SXLPPA15       000F 01
SXLPSWMSK      0038
SXLSCTRL       0010
SXLSHPND       0010 08
SXLSHRD        0010 40
SXLSH2EX       0010 20
SXLSQINC       0004 00010000
SXLSR0SV       0008
SXLSR14H       0000
SXLSR15H       0004
SXLTHRESH      0016 00000003
SXLTIME        0008
SXLTRSV1       0028
SXLWASON       0007 40
SXLXBKST       0010
SXLXLAVL       0000 00
SXLXLCPS       0006
SXLXLCPU       0002
SXLXLENO       0008
SXLXLFLG       0000
SXLXLHLD       0000 80
SXLXLMSK       000C
SXLXLNAV       0000 C0
SXLXLOCK       0000
SXLXLSEQ       0004
SXLXLSPD       0000 40
SXLXLSQT       0014
SXLXLSQTL      0016
SXLXLSZB       0018 00000020
SXLXLSZD       0018 00000004
SXLXLWD1       0000
SXLXLWD2       0004