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Prolog 
Control Block Contents 
   SI2BK DSECT
Storage Layout 
Cross Reference (Contains links to field and bit definitions)
Programming Interface Information:
This information is NOT intended to be
used as Programming Interfaces of z/VM.


  SI2BK Prolog Top of page
 
 NAME       : HCPSI2GB
 DESCRIPTION: SIE STATE DESCRIPTION (Format 2)
 DSECT      : SI2BK
 FUNCTION   :
              This control block describes a guest (virtual
              machine) to the interpretive-execution facility
              of the machine (embodied in the SIE instruction).
              It defines a SIE format-2 state description, which
              is the operand of a host SIE instruction when CP is
              running as a z/Arch mode host. The SIE state
              description used by the host control program to run
              a guest is imbedded in the VMDBK, which is
              described by HCPVMDBK COPY.
              The SIE state description is also used by a guest
              control program operating in zArch mode to run a
              virtual guest. In that context, it is the operand
              of a guest SIE instruction.
              This control block is defined by processor
              architecture.
 LOCATED BY : VMDSDSC in the VMDBK
              VMDSDSC in the V/SIE VMDBK (which is
              identified by VMDTYPE = VMDTYPSI)
 CREATED BY : HCPBVM, HCPWVS
 DELETED BY : HCPUSO, HCPWSIFR
 COMMENTS   :
              As noted above, VM uses the state description in two
              contexts:
              1) It is imbedded within the VMDBK which we use to
              represent first-level guests (RGuests) when we issue
              the SIE instruction to run those guests.  In this
              case, we refer to it as a SIEBK.
              Some of the comments on fields below apply only to the
              SIEBKs which are imbedded in RGuest VMDBKs.  Those
              comments are surrounded by the annotation:
              [VMDBK only:   ].
              2) It is an argument of an RGuest's SIE instruction.
              In this context, it is not associated with a VMDBK --
              at least, our usage can not depend on such an
              association, as we are limited to the interface
              specified by the interpretive-execution architecture.
              When referring to such a state description, we call it
              an SI1BK (if the RGuest is in ESA/370 or ESA/390 mode)
              or an SI2BK (if the RGuest is in zArch mode).
              Note that in processing such a state description, we
              will translate it into a "shadow" state description
              imbedded in a vSIE VMDBK; we may thereafter refer to
              it as a SIEBK.  In general, "[VMDBK only:]" comments
              do not apply to the SIEBKs in vSIE VMDBKs.
 
 
  SI2BK Control Block Content Top of page
 

 SI2BK DSECT Top of page
Hex Dec Type/Val Lng Label (dup) Comments ---- ---- --------- ---- -------------- -------- 0000 0 Structure SI2BK SIE STATE DESCRIPTOR BLOCK (format 2) 0000 0 Bitstring 512 SI2SDSC (0) Guest machine state description (format 2) 0000 0 Signed 4 SI2INTWD (0) Symbol on word boundary for Compare-and-Swap operations 0000 0 Bitstring 1 SI2NTVCT Emulation intervention control ...1 .... SI2IPWAI X'10' SI2IPWAI Wait/Run bit. When this bit is set, the state description is "waiting", and host intervention is needed to make it runnable. .... 1... SI2IPXTC X'08' SI2IPXTC EXTERNAL CALL INTERRUPTION PENDING .... .1.. SI2IPSTP X'04' SI2IPSTP SIE stopping control .... ..1. SI2IPVIO X'02' SI2IPVIO I/O INTERRUPTION PENDING .... ...1 SI2IPEXT X'01' SI2IPEXT EXTERNAL INTERRUPTION PENDING SIESTATC is serialized in the following way: - Testing or modifying SIERUNNING requires Dispatch Lock. - Modifying any other bit requires Dispatch Lock AND either Guest Instruction-stream or Console Function Mode. Testing any of these other bits only requires that 1 of the 3 previously mentioned serializations is held. 0001 1 Bitstring 1 SI2STATC SIE state control fields 1... .... SI2RUNNING X'80' SI2RUNNING Indicates guest CPU is running .1.. .... SI2RSCB X'40' SI2RSCB SIE-state-retention retained- status control bit. When 1, an internal version of the contents of certain fields of the state description retained from a previous SIE instruction invocation may be used .... ..1. SI2EXTMR X'02' SI2EXTMR Expedite-Timer processing enabled .... ...1 SI2EXRUN X'01' SI2EXRUN Expedite-Run processing enabled SIxMODE and SIxMODEX contain bits that can be used to determine the machine mode type. [VMDBK only: In the state descriptions which VM imbeds in (RGuest) VMDBKs, these bits should NOT be used for this purpose anymore; instead, the HCPVMODE macro should be used to test for machine modes: System-370, ESA/370, ESA/XC. 370-XA machines are considered to be ESA/370.] 0002 2 Bitstring 1 SI2MODEX Machine mode control byte MX 1... .... SI2RRF X'80' SI2RRF Region Relocate installed .1.. .... SI22NDVV X'40' SI22NDVV Indicates Rguest runs V=V guests via uVSIE (microcode VSIE). [VMDBK only: This bit is set at the first SIE instruction intercept if TRACE is not being used and SIERRF is set. Valid in all VMDBKs.] ..1. .... SI22NDVR X'20' SI22NDVR Indicates Rguest runs V=R guests via uVSIE (microcode VSIE). [VMDBK only: See SIE2NDVV comments for when set.] .... 1... SI2ESAME X'08' SI2ESAME Guest is in zArch mode .... ...1 SI2MCDS X'01' SI2MCDS If MCDS facility is installed and ESA/370 mode is enabled, then the guest is in MCDS mode. 0003 3 Bitstring 1 SI2MODE Guest machine mode controls .... 1... SI2VR X'08' SI2VR V=R GUEST (PREFERRED STORAGE) STORAGE FOR THE V=R GUEST IS MAPPED SO THAT GUEST ABSOLUTE ADDRESSES ARE EQUAL TO HOST ABSOLUTE ADDRESSES. .... ...1 SI2GPE X'01' SI2GPE This bit signifies that the guest per enhancement feature should be used. When set, guest per enhancement makes it so that guest PER is always enabled. This bit overrides bit 1 in the guest PSW. 0004 4 Signed 4 SI2PREFX Guest prefix register value in bits 1-18 or 1-19. The other bits are not part of the prefix value and must be masked off if SIEPREFX is used as a full word value. Either VMDPRFMK or MSKPFX in HCPEQUAT may be used to isolate the prefix value. MSKPFX can be used to mask off the non-prefix values. VMDPFXMK should be used to also ensure the correct value of bit 19 depending on whether the guest is ESA/390 or z/Architecture mode. 0008 8 Signed 4 * Reserved for IBM hardware 000C 12 Signed 4 * Reserved for programmingg 0010 16 Dbl-Word 8 * Reserved for IBM hardware 0018 24 Dbl-Word 8 * Reserved for IBM hardware 0020 32 Dbl-Word 8 * Reserved for IBM hardware (former HIRES/LORES for 370 interval timer) 0028 40 Bitstring 1 SI2CPUT0 (0) HIGH-ORDER BYTE OF CPU TIMER 1... .... SI2CPUTN X'80' SI2CPUTN TIMER VALUE IS NEGATIVE 0028 40 Signed 8 SI2CPUTM Guest CPU timer value [VMDBK only: This is usually managed by the interpretive-execution facility. See also the description of VMDVTZPT in the VMDBK.] 0030 48 Signed 8 SI2CKC Guest clock comparator value 0038 56 Signed 8 SI2EPOCH Guest time-of-day clock epoch To define delta between host TOD clock and guest TOD clock - epoch is added to host TOD clock value to obtain guest TOD clock value 0040 64 Bitstring 1 SI2SVCTL SVC interception controls 1... .... SI2SVCNN X'80' SI2SVCNN INTERCEPT ALL SVC INSTRUCTIONS .1.. .... SI2SVC1C X'40' SI2SVC1C INTERCEPT ON SVC NUMBER IN SVC1N ..1. .... SI2SVC2C X'20' SI2SVC2C INTERCEPT ON SVC NUMBER IN SVC2N ...1 .... SI2SVC3C X'10' SI2SVC3C INTERCEPT ON SVC NUMBER IN SVC3N 0041 65 Bitstring 1 SI2SVC1N Intercept SVC number first id 0042 66 Bitstring 1 SI2SVC2N Intercept SVC number second id 0043 67 Bitstring 1 SI2SVC3N Intercept SVC number third id 0044 68 Bitstring 2 SI2LCTLS (0) LCTL/LCTLG interception controls 0044 68 Bitstring 1 SI2LCTB0 LCTL interception, CR0-CR7 1... .... SI2LCTL0 X'80' SI2LCTL0 INTERCEPT LCTL CR0 .1.. .... SI2LCTL1 X'40' SI2LCTL1 INTERCEPT LCTL CR1 ..1. .... SI2LCTL2 X'20' SI2LCTL2 INTERCEPT LCTL CR2 ...1 .... SI2LCTL3 X'10' SI2LCTL3 INTERCEPT LCTL CR3 .... 1... SI2LCTL4 X'08' SI2LCTL4 INTERCEPT LCTL CR4 .... .1.. SI2LCTL5 X'04' SI2LCTL5 INTERCEPT LCTL CR5 .... ..1. SI2LCTL6 X'02' SI2LCTL6 INTERCEPT LCTL CR6 .... ...1 SI2LCTL7 X'01' SI2LCTL7 INTERCEPT LCTL CR7 0045 69 Bitstring 1 SI2LCTB1 LCTL interception, CR8-CR15 1... .... SI2LCTL8 X'80' SI2LCTL8 INTERCEPT LCTL CR8 .1.. .... SI2LCTL9 X'40' SI2LCTL9 INTERCEPT LCTL CR9 ..1. .... SI2LCTLA X'20' SI2LCTLA INTERCEPT LCTL CR10 ...1 .... SI2LCTLB X'10' SI2LCTLB INTERCEPT LCTL CR11 .... 1... SI2LCTLC X'08' SI2LCTLC INTERCEPT LCTL CR12 .... .1.. SI2LCTLD X'04' SI2LCTLD INTERCEPT LCTL CR13 .... ..1. SI2LCTLE X'02' SI2LCTLE INTERCEPT LCTL CR14 .... ...1 SI2LCTLF X'01' SI2LCTLF INTERCEPT LCTL CR15 0046 70 Signed 2 SI2ICPUA Virtual CPU address for interpretive execution (bits 10-15 are used, bits 0-9 are reserved for IBM hardware) 0048 72 Bitstring 4 SI2ICTLS (0) Interception controls 0048 72 Bitstring 1 SI2ICPT0 Interception controls, byte 0 1... .... SI2ICPOP X'80' SI2ICPOP Intercept operation exception program interruptions .1.. .... SI2ICPRO X'40' SI2ICPRO Intercept privileged operation program interruptions ..1. .... SI2ICPRG X'20' SI2ICPRG Intercept program interruptions ...1 .... SI2ICFII X'10' SI2ICFII IC.3 Intercept Facility-indicating- instructions .... ...1 SI2ICIPT X'01' SI2ICIPT Intercept Invalidate Page Table Entry instructions (IPTE) or CSP or IDTE or CSPG 0049 73 Bitstring 1 SI2ICPT1 Interception controls, byte 1 .1.. .... SI2ICLPS X'40' SI2ICLPS Intercept Load PSW (LPSW), Load PSW Extended (LPSWE), and Extract PSW (EPSW) instructions ..1. .... SI2ICPTL X'20' SI2ICPTL Intercept Purge TLB (PTLB) and Purge ALB (PALB) instructions ...1 .... SI2ICSSM X'10' SI2ICSSM Intercept Set System Mask (SSM) instructions .... 1... SI2ICBSA X'08' SI2ICBSA Intercept Branch and Set Authority (BSA) instructions .... .1.. SI2ICSTC X'04' SI2ICSTC Intercept Store Control (STCTL, STCTG) instructions .... ..1. SI2ICSTN X'02' SI2ICSTN Intercept Store Then And System Mask (STNSM) instructions .... ...1 SI2ICSTO X'01' SI2ICSTO Intercept Store Then Or System Mask (STOSM) instructions X'80' Reserved for future IBM use 004A 74 Bitstring 1 SI2ICPT2 Interception controls, byte 2 1... .... SI2ICSTK X'80' SI2ICSTK Intercept Store Clock (STCK) and Store Clock Fast (STCKF) instructions .1.. .... SI2ICISK X'40' SI2ICISK Intercept Insert Storage Key Extended (ISKE) instructions ..1. .... SI2ICSSK X'20' SI2ICSSK Intercept Set Storage Key Extended (SSKE) instructions ...1 .... SI2ICRRB X'10' SI2ICRRB Intercept Reset Reference Bit Extended (RRBE) instructions .... 1... SI2ICPC X'08' SI2ICPC Intercept Program Call (PC) instructions .... .1.. SI2ICPT X'04' SI2ICPT Intercept Program Transfer (PT) and Program Transfer with Instance (PTI) instructions .... ..1. SI2ICTPT X'02' SI2ICTPT Intercept Test Protection (TPROT) instructions .... ...1 SI2ICLSP X'01' SI2ICLSP Intercept Load Address Space Parameters (LASP) instructions 004B 75 Bitstring 1 SI2ICPT3 Interception controls, byte 3 .1.. .... SI2ICSPT X'40' SI2ICSPT Intercept Set CPU Timer (SPT) and Store CPU Timer (STPT) instructions ..1. .... SI2ICSCK X'20' SI2ICSCK Intercept Set Clock Comparator (SCKC) and Store Clock Comparator (STCKC) instructions instruction .... 1... SI2ICPR X'08' SI2ICPR Intercept Program Return (PR) instruction .... .1.. SI2ICBAK X'04' SI2ICBAK Intercept Branch and Stack (BAKR) instruction .... ..1. SI2ICPG X'02' SI2ICPG Intercept Page In (PGIN) and Page Out (PGOUT) instructions. 004C 76 Bitstring 4 SI2ECA (0) Execution controls 004C 76 Bitstring 1 SI2ECA0 Execution controls, byte 0 1... .... SI2ECEXT X'80' SI2ECEXT External Interruption Interpretation Assist .1.. .... SI2ECINT X'40' SI2ECINT Intervention Bypass Assist ..1. .... SI2ECWAI X'20' SI2ECWAI Guest Wait-State Assist ...1 .... SI2ECSGP X'10' SI2ECSGP SIGP Interpretation Assist .... 1... SI2ECALT X'08' SI2ECALT Alert monitoring bit .... .1.. SI2ECIO2 X'04' SI2ECIO2 I/O-Interpretation-level-2 activation bit .... ...1 SI2ECMVP X'01' SI2ECMVP MVPG Facility enablement. When this bit is one, SIE will inter- pret the MVPG and IESBE opcodes. 004D 77 Bitstring 1 SI2ECA1 Execution controls, byte 1 004E 78 Bitstring 1 SI2ECA2 Execution controls, byte 2 004F 79 Bitstring 1 SI2ECA3 Execution controls, byte 3 .... .1.. SI2SIGA X'04' SI2SIGA Signal Adapter (SIGA) Assist 0050 80 Bitstring 1 SI2ICODE Interception Event Code This field describes a guest condition detected by the interpretive-execution facility (usually), which requires software intervention or simulation. [VMDBK only: It is also used by software to indicate that there exists a description of guest conditions by software, in VMDNTMOD, that requires sortware intervention for tracing.] 00000000 SI2ENDOP 0 SI2ENDOP RESERVED FOR IBM SOFTWARE USE SIxENDOP is used to indicate that the guest machine is between instuctions, or currently executing in emulation mode 00000004 SI2ICNTC 4 SI2ICNTC INSTRUCTION INTERCEPTION. A GUEST INSTRUCTION WAS FOUND BY EMULATION HARDWARE WHICH IS NOT EMULATED, OR WHICH WAS REQUESTED FOR INTERCEPTION IN THE INTERCEPTION CONTROLS. 00000008 SI2ICPNT 8 SI2ICPNT PROGRAM INTERRUPT INTERCEPTION 0000000C SI2ICBOT 12 SI2ICBOT BOTH INSTRUCTION AND PROGRAM INTERRUPT INTERCEPTIONS 00000010 SI2ICPEX 16 SI2ICPEX PENDING EXTERNAL INTERRUPT 00000014 SI2ICXNT 20 SI2ICXNT EXTERNAL INTERRUPT INTERCEPTION 00000018 SI2ICPIO 24 SI2ICPIO PENDING I/O INTERRUPT INTERCEPT 0000001C SI2ICWT 28 SI2ICWT WAIT STATE INTERCEPTION 00000020 SI2ICVAL 32 SI2ICVAL VALIDITY INTERCEPTION 00000024 SI2IMISC 36 SI2IMISC SOFTWARE USE ONLY Used to indicate that a software event has occurred which is not one of the other codes. [VMDBK only: the condition is further described in the VMDNTMOD field.] 00000028 SI2ICSTP 40 SI2ICSTP STOP INTERCEPTION 0000002C SI2ICOUO 44 SI2ICOUO OPERATION EXCEPTION INTERCEPTION 00000030 SI2ICALT 48 SI2ICALT Alert interception 00000038 SI2ICPIX 56 SI2ICPIX PARTIAL INSTRUCTION-EXECUTION INTERCEPTION 0000003C SI2ICIOR 60 SI2ICIOR I/O INTERRUPTION INTERCEPTION 00000040 SI2ICION 64 SI2ICION I/O INSTRUCTION INTERCEPTION 00000044 SI2ICRUN 68 SI2ICRUN Expedite-Run processing Interception 00000048 SI2ICTMR 72 SI2ICTMR Expedite-Timer processing Interception 00000003 SI2IMLT4 X'03' SI2IMLT4 To ensure field is multiple of 4 0051 81 Bitstring 1 SI2ICFLG Instruction interception status .11. .... SI2ICEXL X'60' SI2ICEXL In SIE the interception status is one byte, x'51'. The XILC is bits 1 and 2 of that byte. A value in those bits of 2 indicates the interception was for an EX type instruction. A value of 3 in those bits indicates the interception was for an EXRL type instruction. ICEXL and ICEXS describe this scenario. .1.. .... SI2ICEXS X'40' SI2ICEXS The intercepted Execute-type instruction has an instruction length of 6 if bits 1 and 2 are on (a value of 3) and ICEX is on. The Execute-type instruction has an instruction length of 4 if bit 1 is on and bit 2 is off (a value of 2) and if ICEX is on. These two bits are only set if the Execute-Extensions Facility is installed. .... ..1. SI2ICIF X'02' SI2ICIF INSTRUCTION FETCH EVENT (P.E.R) .... ...1 SI2ICEX X'01' SI2ICEX The intercepted instruction was the subject of an execute-type instruction 0052 82 Signed 2 SI2IHCPU Host CPU address that last entered emulation mode for this state description 0054 84 Signed 2 * Reserved for IBM use 0056 86 Bitstring 6 SI2IPARM (0) Interception parameter (A & B) 0056 86 Signed 2 SI2IPA (0) Interception parameter A Bits 0-15 0056 86 Signed 2 SI2INST (0) Interception parameter bit 0-15 0056 86 Bitstring 1 SI2INSTO Interception parameter bits 0-7 First byte of the OPCODE 00000056 SI2IPA0 SI2INSTO 0057 87 Bitstring 1 SI2INSTE Interception parameter bit 8-15 .1.1 .111 SI2IPA1 SI2INSTE SI2IPA1 Second byte of the OPCODE for extended opcode instruction or R1R2 field or immediate data field or length field 0058 88 Signed 4 SI2IPB (0) Interception parameter B Bits 16-47 For instruction interception, this field contains bytes 2 and beyond of the instruction text, if the instruction is that long 0058 88 Signed 2 SI2IPBH0 (0) Halfword 0 of IPB 0058 88 Bitstring 1 SI2IPB0 Byte 0 of IPB 0059 89 Bitstring 1 SI2IPB1 Byte 1 of IPB 005A 90 Signed 2 SI2IPBH1 (0) Halfword 1 of IPB 005A 90 Bitstring 1 SI2IPB2 Byte 2 of IPB 005B 91 Bitstring 1 SI2IPB3 Byte 3 of IPB 005C 92 Signed 4 SI2IBM3 Reserved for IBM hardware use 0060 96 Bitstring 1 SI2RCPB0 Function-Progress Flags .1.. .... SI2SKAIP X'40' SI2SKAIP Storage key assist in progress 0061 97 Bitstring 3 SI2ECB (0) Execution Controls B 0061 97 Bitstring 1 SI2ECBB0 Execution Controls B (ECB byte 0) 1... .... SI2QEBSM X'80' SI2QEBSM (00) QEBSM Interpretation Active 0062 98 Bitstring 1 SI2ECBB1 (0) Execution Controls B (ECB byte 1) 0062 98 Bitstring 1 SI2RCPB2 Byte two, flags for assists ...1 .... SI2RCPBY X'10' SI2RCPBY (11) RCP Bypass (B) for guest 0063 99 Bitstring 1 SI2ECBB2 Execution Controls B (ECB byte 2) .... 1... SI2ECB20 X'08' SI2ECB20 (20) Reserved for IBM Use .... .1.. SI2ECB21 X'04' SI2ECB21 (21) Reserved for IBM Use 0064 100 Address 4 SI2ISCAA System control area address 0068 104 Signed 4 SI2RSVD2 Reserved for IBM hardware 006C 108 Signed 4 SI2TODPR (0) TOD Programmable Register 006C 108 Signed 2 * TODPR high half 006E 110 Signed 2 SI2TODPF TOD Programmable Field 0070 112 Address 4 SI2GISA GISA Absolute Address 0074 116 Bitstring 4 SI2IOPCT (0) I/O Interpretation Control 2 0074 116 Bitstring 1 SI2AZN Active zone number 0075 117 Bitstring 1 * Reserved for IBM hardware use 0076 118 Signed 2 SI2DVSCS (0) IRB DS mask 0076 118 Bitstring 1 SI2DVST Device status byte of the IRB DS mask - the contents of this field are ANDed with the device status byte of the IRB by TSCH to see if type B information is present 1... .... CSWATTN X'80' CSWATTN ATTENTION .1.. .... CSWSM X'40' CSWSM STATUS MODIFIER ..1. .... CSWCUE X'20' CSWCUE CONTROL UNIT END ...1 .... CSWBUSY X'10' CSWBUSY BUSY .... 1... CSWCE X'08' CSWCE CHANNEL END .... .1.. CSWDE X'04' CSWDE DEVICE END .... ..1. CSWUC X'02' CSWUC UNIT CHECK .... ...1 CSWUE X'01' CSWUE UNIT EXCEPTION .... 11.. CSWCEDE X'0C' CSWCEDE CHANNEL END AND DEVICE END .... 111. CSWCDEUC X'0E' CSWCDEUC CHANNEL END,DEVICE END,UNIT CHECK ..1. 11.. CSWCEDC X'2C' CSWCEDC CHANNEL END,DEVICE END,AND CUE .1.1 .... CSWSMBSY X'50' CSWSMBSY CONTROL UNIT BUSY .111 .... CSWCBS X'70' CSWCBS CONTROL UNIT BUSY AND END 1... .1.. CSWDEA X'84' CSWDEA DEVICE END AND ATTENTION 0077 119 Bitstring 1 SI2SCST Subchannel status byte of the IRB DS mask - the contents of this field are ANDed with the subchannel status byte of the IRB by TSCH to see if type B information is present 1... .... CSWPCI X'80' CSWPCI PROGRAM CONTROLLED INTERRUPTION Command Mode only .1.. .... CSWIL X'40' CSWIL INCORRECT LENGTH INDICATION Command Mode only ..1. .... CSWPRG X'20' CSWPRG CHANNEL PROGRAM CHECK ...1 .... CSWPROT X'10' CSWPROT STORAGE PROTECTION CHECK .... 1... CSWCDC X'08' CSWCDC CHANNEL DATA CHECK .... .1.. CSWCCC X'04' CSWCCC CHANNEL CONTROL CHECK .... ..1. CSWIFCC X'02' CSWIFCC INTERFACE CONTROL CHECK .... ...1 CSWCHC X'01' CSWCHC CHANNEL CHAINING CHECK Command Mode only .... 111. CSWHCE X'0E' CSWHCE CDC+CCC+IFCC HARDWARE ERRORS ..11 ...1 CSWPCE X'31' CSWPCE PRG+CHC+PROT PROGRAM ERRORS 0078 120 Signed 4 SI2RSVD3 (0) Reserved for IBM hardware 0078 120 Bitstring 1 SI2AZM Alert generating zone mask 0079 121 Bitstring 2 SI2IBM2 Reserved for IBM hardware 007B 123 Bitstring 1 * Reserved for IBM hardware 007C 124 Signed 4 * Reserved for IBM hardware 0080 128 Signed 8 SI2GMSOR Guest real main-storage origin in host address space 0088 136 Signed 8 SI2GMSLM Guest real main-storage limit in host address space Bits 0-43 of this field, padded on the right with 20 *ones*, is the highest host virtual address to which the guest has access. Thus, the actual guest storage size is (GMSLM+1M-GMSOR). 00FFFFFF SI2GMSMKH X'FFFFFFFF' Mask for significant bits of GMSOR/GMSLM -- high half 00F00000 SI2GMSMKL X'FFF00000' Ditto -- low half 0090 144 Bitstring 16 SI2GPSW (0) Guest PSW (zArch guests) 0090 144 Bitstring 8 SI2PSW (0) Guest PSW (ESA/390 guests) 0090 144 Signed 4 SI2PSW0F (0) Bytes 0:3 of guest PSW 0090 144 Bitstring 1 SI2PSW0B (0) Byte 0 of guest PSW 1111 11.. PSWIOMSK X'FC' PSWIOMSK CHANNEL MASK, CHANNELS 0-5 .... ..1. PSWIOSMB X'02' PSWIOSMB I/O SUMMARY MASK, CHANNEL 6-15 .... ...1 PSWEXSMB X'01' PSWEXSMB EXTERNAL INTERRUPT SUMMARY MASK 0090 144 Bitstring 1 SI2PSW0 Byte 0 of guest PSW .1.. .... PSWPERA X'40' PSWPERA PROGRAM EVENT RECORDING ACTIVE .... .1.. PSWTRAN X'04' PSWTRAN ADDRESS TRANSLATE MODE ACTIVE .... ..1. PSWIOSM X'02' PSWIOSM I/O INTERRUPTION SUMMARY MASK .... ...1 PSWEXSM X'01' PSWEXSM EXTERNAL INTERRUPT SUMMARY MASK 0091 145 Bitstring 1 SI2PSW1 Byte 1 of guest PSW 1111 .... PSWKEY X'F0' PSWKEY PSW ACCESS KEY EXTRACTION MASK .... 1... PSWECMD X'08' PSWECMD EXTENDED CONTROL MODE ACTIVE .... .1.. PSWMCHK X'04' PSWMCHK MACHINE CHECK SUMMARY MASK .... ..1. PSWWAIT X'02' PSWWAIT PROGRAM WAIT STATE .... ...1 PSWPROB X'01' PSWPROB PROGRAM PROBLEM STATE .... ...1 PSWMAPPD X'01' PSWMAPPD For BC-mode PSWs created by the 370 Accommodation facility, this bit being set indicates that the PSW is really a "mapped" PSW. See HCPPSW. 0092 146 Signed 2 SI2PSW2H (0) Bytes 2:3 of guest PSW 0092 146 Bitstring 1 SI2PSW2 Byte 2 of guest PSW 11.. .... PSWASMSK X'C0' PSWASMSK ADDRESS SPACE CONTROL MASK 11.. .... PSWHMODE X'C0' PSWHMODE HOME-SPACE MODE 1... .... PSWSMODE X'80' PSWSMODE SECONDARY MODE .1.. .... PSWAMODE X'40' PSWAMODE ACCESS-REGISTER MODE ..11 .... PSWCOND X'30' PSWCOND PSW CONDITION CODE ..1. .... PSWCOND2 X'20' PSWCOND2 PSW CONDITION CODE BIT FOR CC=2,3 ...1 .... PSWCOND1 X'10' PSWCOND1 PSW CONDITION CODE BIT FOR CC=1,3 .... 1111 PSWPMSK X'0F' PSWPMSK FIXO+DECO+EXUN+SIGN PROGRAM MASK .... 1... PSWFIXO X'08' PSWFIXO FIXED-PT OVERFLOW INTRPT MASK .... .1.. PSWDECO X'04' PSWDECO DECIMAL OVERFLOW INTRPT MASK .... ..1. PSWEXUN X'02' PSWEXUN EXPONENT UNDERFLOW INTRPT MASK .... ...1 PSWSIGN X'01' PSWSIGN SIGNIFICANCE INTERRUPT MASK .... .... PSWPMODE X'00' PSWPMODE PRIMARY-SPACE MODE 0093 147 Bitstring 1 SI2PSW3 Reserved for IBM hardware .... ...1 PSWEA X'01' PSWEA Extended Addressing Mode 0094 148 Signed 4 SI2PSW4F (0) Bytes 4:7 of guest PSW 0094 148 Bitstring 1 SI2PSW4B (0) Byte 4 of guest PSW 11.. .... PSWILCBC X'C0' PSWILCBC INSTRUCTION LENGTH CODE (ILC) 1... .... PSWILCB4 X'80' PSWILCB4 BC MODE ILC, 4 BYTE LENGTH .1.. .... PSWILCB2 X'40' PSWILCB2 BC MODE ILC, 2 BYTE LENGTH ..11 .... PSWCONDB X'30' PSWCONDB PSW CONDITION CODE ..1. .... PSWCONB2 X'20' PSWCONB2 PSW CONDITION CODE BIT FOR CC=2,3 ...1 .... PSWCONB1 X'10' PSWCONB1 PSW CONDITION CODE BIT FOR CC=1,3 .... 1111 PSWPMSKB X'0F' PSWPMSKB FIXOB+DECOB+EXUNB+SIGNB PROGRAM MASK .... 1... PSWFIXOB X'08' PSWFIXOB FIXED-PT OVERFLOW INTRPT MASK .... .1.. PSWDECOB X'04' PSWDECOB DECIMAL OVERFLOW INTRPT MASK .... ..1. PSWEXUNB X'02' PSWEXUNB EXPONENT UNDERFLOW INTRPT MASK .... ...1 PSWSIGNB X'01' PSWSIGNB SIGNIFICANCE INTERRUPT MASK Equate to define the open storage key associated with the Storage-Protection Override facility .... 1..1 KEYOPEN 9 KEYOPEN Access-control bits for the open storage key. Equates for storage key processing. May be used to process storage key information in ISKE/SSKE operand format. 1111 .... KEYACC X'F0' KEYACC Storage key access control .... 1... KEYFETCH X'08' KEYFETCH Storage key fetch-protection control 1111 1... KEYACCF KEYACC+KEYFETCH KEYACCF Storage key access and fetch .... .1.. KEYREF X'04' KEYREF Storage key reference bit .... ..1. KEYCHG X'02' KEYCHG Storage key change bit .... .11. KEYRC KEYREF+KEYCHG KEYRC Storage key reference and change 1111 111. KEYISOL KEYACCF+KEYRC KEYISOL Isolate entire 7 bit storage key Equates for SSKE M3 mask field option bits .... 1... SSKENQ 8 SSKENQ SSKE Non-Quiescing .... .1.. SSKEMR 4 SSKEMR SSKE Reference bit update bypass .... ..1. SSKEMC 2 SSKEMC SSKE Change bit update bypass .... ...1 SSKEMB 1 SSKEMB SSKE Multiple 4K blocks !IC Codes used as operand to SAC instruction .... .... SACPRIM X'000' SACPRIM Primary-space mode SI2PSW4B SACSECO X'100' SACSECO Secondary-space mode SI2PSW4B SACAR X'200' SACAR Access-register mode SI2PSW4B SACHOME X'300' SACHOME Home-space mode Codes used in register operand to IDTE instruction SI2PSW4B IDTECBA X'0800' IDTECBA IDTE-clearing-by-ASCE Codes used to locate instances of SAM* (Set Address Mode) instructions SAM31 and SAM64 (used for cross reference as HCPXREF operands) ...1 1111 SAM31 31 SAM31 Cross reference Set Addressing Mode entry into 31-bit addressing mode .1.. .... SAM64 64 SAM64 Cross reference Set Addressing Mode entry into 64-bit addressing mode Equates to help deal with virtual addresses. SI2PSW4B DATSXM X'7FF00000' DATSXM Isolate segment-index field of a virtual address. SI2PSW4B DATPXM X'000FF000' DATPXM Isolate page-index field of a virtual address. SI2PSW4B DATBXM X'00000FFF' DATBXM Isolate byte-index field of a virtual address. Equates to use in NILL instructions to convert one 64-bit address to another. SI2PSW4B PTE2PTO X'F800' PTE2PTO Convert PTE addr to PTO addr SI2PSW4B PTE2PGM X'F000' PTE2PGM Convert PTE addr to PGMBK addr SI2PSW4B PTO2PGM X'F000' PTO2PGM Convert PTO addr to PGMBK addr SI2PSW4B STD2STO X'F000' STD2STO Convert STD addr to STO addr SI2PSW4B STE2STO X'F000' STE2STO Convert STE addr to STO addr SI2PSW4B STE2PTO X'F800' STE2PTO Convert STE contents to PTO addr SI2PSW4B STE2PGM X'F000' STE2PGM Convert STE contents to PGMBK Equates related to access-list designations. SI2PSW4B ALD0ALOM X'7FFFFF80' ALD0ALOM Isolate access-list origin .111 1111 ALD0ALLM X'0000007F' ALD0ALLM Isolate access-list length .... ..11 ALD0ALNS 3 ALD0ALNS Bits to shift right an ALEN to get the associated ALL value. 1... .... ALD0ALUN 128 ALD0ALUN Number of bytes in an "access-list unit", the number of bytes in the smallest variation of the size of an access list. .... .111 ALD0ALUS 7 ALD0ALUS Number of bits to shift left in order to multiply by ALD0ALUN. 1... .... ALDMIN ALD0ALUN ALDMIN Length of smallest access list, in bytes. SI2PSW4B ALDMAX 4096*4 ALDMAX Length of maximum access list, in bytes. Equates related to ASTEO-words: SI2PSW4B ASWASTEOM X'7FFFFFC0' ASWASTEOM Isolate ASTE origin Equates related to DUCTO-words: SI2PSW4B DUWDUCTOM X'7FFFFFC0' DUWDUCTOM Isolate DUCT origin SIGP CODES DEFINITIONS SIGNAL PROCESSOR CODES .... ...1 SIGPSENS 001 SIGPSENS SIGP SENSE .... ..1. SIGPEXTC 002 SIGPEXTC SIGP EXTERNAL CALL .... ..11 SIGPEMER 003 SIGPEMER SIGP EMERGENCY SIGNAL .... .1.. SIGPSTRT 004 SIGPSTRT SIGP START .... .1.1 SIGPSTOP 005 SIGPSTOP SIGP STOP .... .11. SIGPRSTR 006 SIGPRSTR SIGP RESTART .... .111 SIGPIPR 007 SIGPIPR SIGP INITIAL PROGRAM RESET .... 1... SIGPPR 008 SIGPPR SIGP PROGRAM RESET .... 1..1 SIGPSSTT 009 SIGPSSTT SIGP STOP AND STORE STATUS .... 1.11 SIGPICPU 011 SIGPICPU SIGP INITIAL CPU RESET .... 11.. SIGPCPU 012 SIGPCPU SIGP CPU RESET .... 11.1 SIGPSPFX 013 SIGPSPFX SIGP SET PREFIX .... 111. SIGPSSTS 014 SIGPSSTS SIGP STORE STATUS AT ADDRESS ...1 ...1 SIGPSXST 017 SIGPSXST SIGP Store Extended Status At Address ...1 ..1. SIGPSARC 018 SIGPSARC SIGP Set Architecture ...1 .1.1 SIGPSRST 021 SIGPSRST SIGP Sense Running STatus 0094 148 Bitstring 1 SI2PSW4 Byte 4 of guest PSW 1... .... PSW31BT X'80' PSW31BT 31-BIT LOGICAL ADDRESSING MODE 1... .... PSWBA PSW31BT PSWBA Basic Addressing Mode .111 1111 PSWHIADR X'7F' PSWHIADR INSTRUCTION COUNTER BITS 1-7 - MUST BE ZERO IN 24-BIT MODE. .... .... PSW31AMF X'80000000' PSW31AMF ADDRESS MODE FULLWORD MASK - CORRESPONDS TO PSW31BT 0095 149 Bitstring 3 SI2PSW57 Bytes 5:7 of guest PSW 0098 152 Address 8 SI2PSWIA Bytes 8:15 of guest PSW (zArch instruction address) 00A0 160 Bitstring 16 SI2GG145 (0) Guest GPR 14 and GPR 15 00A0 160 Signed 8 SI2GG14 Guest GPR 14 for SIE use only 00A8 168 Signed 8 SI2GG15 Guest GPR 15 for SIE use only 00B0 176 Dbl-Word 8 * Reserved for IBM hardware 00B8 184 Signed 2 * Reserved for IBM hardware 00BA 186 Bitstring 6 SI2ESB (0) Expanded-storage boundaries (for non-RRF guest) 00BA 186 Bitstring 3 SI2XSO Expanded-storage origin 00BD 189 Bitstring 3 SI2XSL Expanded-storage limit 00C0 192 Bitstring 52 SI2UZP0 Interruption parameters Guest Prefix Storage Area bytes 128-175 (x80-xAF) or, Guest Prefix Storage Area bytes 184-195 (xB8-xC3) or, parameters for partial- execution interception depending on the event 00F4 244 Bitstring 6 SI2IBM1 Reserved for IBM hardware 00FA 250 Bitstring 2 SI2IEF Migration Emulation Controls 00FC 252 Signed 4 SI2IBM4 Reserved for IBM hardware 0100 256 Bitstring 128 SI2GCRS (0) Guest Control registers 0-15 If SIxMODEX.SIxESAME is NOT on then the 16 32-bit control registers are in the rightmost word of each doubleword register area 0100 256 Signed 8 SI2GCR0 (0) zArch Guest Control register 0 0100 256 Bitstring 1 SI2GCR00 Guest CR0 byte 0 0101 257 Bitstring 1 SI2GCR01 Guest CR0 byte 1 0102 258 Bitstring 1 SI2GCR02 Guest CR0 byte 2 0103 259 Bitstring 1 SI2GCR03 Guest CR0 byte 3 0104 260 Bitstring 1 SI2GCR04 Guest CR0 byte 4 0105 261 Bitstring 1 SI2GCR05 Guest CR0 byte 5 0106 262 Bitstring 1 SI2GCR06 Guest CR0 byte 6 0107 263 Bitstring 1 SI2GCR07 Guest CR0 byte 7 0108 264 Signed 8 SI2GCR1 (0) zArch Guest Control register 1 0108 264 Bitstring 7 * 010F 271 Bitstring 1 SI2GCR17 Guest CR1 byte 7 0110 272 Signed 8 SI2GCR2 zArch Guest Control register 2 0118 280 Signed 8 SI2GCR3 zArch Guest Control register 3 0120 288 Signed 8 SI2GCR4 zArch Guest Control register 4 0128 296 Signed 8 SI2GCR5 (0) zArch Guest Control register 5 0128 296 Bitstring 4 * 012C 300 Bitstring 1 SI2GCR54 Guest CR5 byte 4 012D 301 Bitstring 3 * 0130 304 Signed 8 SI2GCR6 (0) zArch Guest Control register 6 0130 304 Bitstring 4 * 0134 308 Bitstring 1 SI2GCR64 Guest CR6 byte 4 0135 309 Bitstring 3 * 0138 312 Signed 8 SI2GCR7 zArch Guest Control register 7 0140 320 Signed 8 SI2GCR8 (0) zArch Guest Control register 8 0140 320 Bitstring 1 SI2GCR80 z/Arch guest CR8 Byte 0 0141 321 Bitstring 1 SI2GCR81 z/Arch guest CR8 Byte 1 0142 322 Signed 2 SI2GCR8E (0) Enhanced-Monitor Mask 0142 322 Bitstring 1 SI2GCR82 z/Arch guest CR8 Byte 2 0143 323 Bitstring 1 SI2GCR83 z/Arch guest CR8 Byte 3 ..1. .... SI2EMC10 X'20' SI2EMC10 Enhanced-Mon Class 10 0144 324 Bitstring 2 SI2GCR8A Guest CR8 bytes 4+5, EAX 0146 326 Bitstring 2 SI2GCR8M Guest CR8 bytes 6+7, Monitor Mask 0148 328 Signed 8 SI2GCR9 (0) zArch Guest Control register 9 0148 328 Bitstring 4 * 014C 332 Bitstring 1 SI2GCR94 Guest CR9 byte 4 014D 333 Bitstring 1 SI2GCR95 Guest CR9 byte 5 014E 334 Bitstring 2 * 0150 336 Signed 8 SI2GCR10 zArch Guest Control register 10 0158 344 Signed 8 SI2GCR11 zArch Guest Control register 11 0160 352 Signed 8 SI2GCR12 (0) zArch Guest Control register 12 0160 352 Bitstring 7 * 0167 359 Bitstring 1 SI2GCRC7 Guest CR12 byte 7 0168 360 Signed 8 SI2GCR13 (0) zArch Guest Control register 13 0168 360 Bitstring 7 * 016F 367 Bitstring 1 SI2GCRD7 Guest CR13 byte 7 0170 368 Signed 8 SI2GCR14 (0) zArch Guest Control register 14 0170 368 Bitstring 4 * 0174 372 Bitstring 1 SI2GCRE4 Guest CR14 byte 4 0175 373 Bitstring 1 SI2GCRE5 Guest CR14 byte 5 0176 374 Bitstring 2 * 0178 376 Signed 8 SI2GCR15 zArch Guest Control register 15 0180 384 Bitstring 128 SI2HWRSV (0) Reserved for IBM hardware 0180 384 Signed 8 SI2BEAR Breaking-Event-Address Register 0188 392 Bitstring 24 * Reserved for IBM hardware 01A0 416 Signed 4 SI2FLD Facility List Designation for STFLE 01A4 420 Bitstring 92 * Reserved for IBM hardware 00000200 SI2BLEN *-SI2BK Block size in bytes 00000040 SI2DWLEN ((*-SI2BK)+7)/8 Block size in doublewords Redefine interception parameters for validity interception. 0056 86 Bitstring 4 SI2VIRSN (0) Validity interception reason code 0056 86 Bitstring 1 SI2VIWHO "Who" recognized the validity interception? How many levels deep in interpretive execution, and what component? 0057 87 Bitstring 1 SI2VIWHN "When" was the condition encountered (SIE entry, exit, instruction interpretation, etc.)? 0058 88 Signed 2 SI2VIWHY "Why" did the validity inter- ception occur? What was the specific defect in the guest definition or host state? 005A 90 Bitstring 2 SI2VIRSV Reserved; zeroes stored on validity interception Redefine Guest Prefix Area 128-239 (x80-xAF) 00C0 192 Signed 4 SI2EXMSF MSF Data Block Addr-Class 21 EXT 00C4 196 Signed 4 SI2IEXCF (0) External Interrupt CPU and Code 00C4 196 Signed 2 SI2IEXCA External Interrupt CPU address 00C6 198 Signed 2 SI2IEXCD (0) External Interrupt Code 00C6 198 Bitstring 1 SI2IEXCL EXTERNAL INTERRUPTION CLASS CODE 00000000 EXTICL00 00 EXTICL00 CLASS 00 EXTERNAL INTERRUPTS (INTERRUPT KEY, INTERVAL TIMER) 00000010 EXTICL10 16 EXTICL10 CLASS 10 EXTERNAL INTERRUPTS (TIMER, COMPARATOR, TOD SYNCH) 00000012 EXTICL12 18 EXTICL12 CLASS 12 EXTERNAL INTERRUPTS (MULTI-CPU SIGNALS) 00000014 EXTICL14 20 EXTICL14 CLASS 14 EXTERNAL INTERRUPTS (ETR INTERRUPTS) 00000020 EXTICL20 32 EXTICL20 Class 20 external interrupts (Time zone transition) 00000024 EXTICL24 36 EXTICL24 CLASS 24 EXTERNAL INTERRUPTS (SERVICE SIGNALS) 00000026 EXTICL26 38 EXTICL26 CLASS 26 EXTERNAL INTERRUPTS (ESA/XC INTERRUPTS) 00000040 EXTICL40 64 EXTICL40 CLASS 40 EXTERNAL INTERRUPTS (VMCF AND IUCV COMMUNICATION) 00C7 199 Bitstring 1 SI2IEXCT EXTERNAL INTERRUPTION TYPE CODE 00000040 EXTIKEY 64 EXTIKEY CODE X'0040' INTERRUPT KEY 00000080 EXTITMR 128 EXTITMR CODE X'0080' 370 INTERVAL TIMER 00000004 EXTICKC 04 EXTICKC CODE X'1004' CLOCK COMPARATOR 00000005 EXTICPU 05 EXTICPU CODE X'1005' CPU TIMER 00000000 EXTIMALF 00 EXTIMALF CODE X'1200' MALFUNCTION ALERT 00000001 EXTIEMGS 01 EXTIEMGS CODE X'1201' EMERGENCY SIGNAL 00000002 EXTICALL 02 EXTICALL CODE X'1202' EXTERNAL CALL 00000006 EXTIETR 06 EXTIETR CODE X'1406' ETR INTERRUPT 00000007 EXTIMEAS 07 EXTIMEAS Code X'1407' Measurement Alert 00000004 EXTITZCH 04 EXTITZCH CODE X'2004' Time Zone Change 00000001 EXTISVSG 01 EXTISVSG CODE X'2401' SERVICE SIGNAL 00000002 EXTIPVM 02 EXTIPVM CODE X'2402' PVM LOGICAL DEVICE 00000003 EXTIXC 03 EXTIXC CODE X'2603' ESA/XC and other VM external interrupts 00000000 EXTIIUCV 00 EXTIIUCV CODE X'4000' IUCV INTERRUPTION 00000001 EXTIVMCF 01 EXTIVMCF CODE X'4001' VMCF INTERRUPTION 00C8 200 Signed 2 SI2SVCIL SVC Instruction Length Code 00CA 202 Signed 2 SI2SVCNT SVC Interrupt Code 00CC 204 Signed 4 SI2IPRCD (0) Program ILC and Interrupt Code 00CC 204 Signed 2 SI2IPRCL Program Instruction Length Code 00CE 206 Signed 2 SI2IPRCC (0) Program Interrupt Code 00000136 PRGIADCP X'0136' PRGIADCP Addressing capability 00008000 PRGIARPC X'8000' PRGIARPC ARITHMETIC PARTIAL COMPLETION BIT OF THE EXCEPTION EXTENSION CODE (BIT 0 OF THE PROGRAM CHECK INTERRUPT CODE) 00CE 206 Bitstring 1 SI2IPRC0 Program interrupt code byte 0 00CF 207 Bitstring 1 SI2IPRC1 Program interrupt code byte 1 00000000 PRGICCLR X'00' PRGICCLR USED TO CLEAR PRGICODE 00000001 PRGIOPER X'01' PRGIOPER OPERATION 00000002 PRGIPRIV X'02' PRGIPRIV PRIVILEGED OPERATION 00000003 PRGIEXEC X'03' PRGIEXEC EXECUTE 00000004 PRGIPROT X'04' PRGIPROT PROTECTION 00000005 PRGIADDR X'05' PRGIADDR ADDRESSING 00000006 PRGISPEC X'06' PRGISPEC SPECIFICATION 00000007 PRGIDATA X'07' PRGIDATA DATA 00000008 PRGIFXDV X'08' PRGIFXDV FIXED POINT OVERFLOW 00000009 PRGIFDIV X'09' PRGIFDIV FIXED POINT DIVIDE 0000000A PRGIDECO X'0A' PRGIDECO DECIMAL OVERFLOW 0000000B PRGIDDIV X'0B' PRGIDDIV DECIMAL DIVIDE 0000000C PRGIEXPO X'0C' PRGIEXPO EXPONENT OVERFLOW 0000000D PRGIEXPU X'0D' PRGIEXPU EXPONENT UNDERFLOW 0000000E PRGISGNF X'0E' PRGISGNF SIGNIFICANCE 0000000F PRGIFPDV X'0F' PRGIFPDV FLOATING POINT DIVIDE 00000010 PRGISEG X'10' PRGISEG SEGMENT TRANSLATION 00000011 PRGIPAGE X'11' PRGIPAGE PAGE TRANSLATION 00000012 PRGITSPC X'12' PRGITSPC TRANSLATION SPECIFICATION 00000013 PRGISPOP X'13' PRGISPOP SPECIAL OPERATION 00000014 PRGIPPF X'14' PRGIPPF PSEUDO-PAGE-FAULT (SOFTWARE ONLY) 00000015 PRGIOPND X'15' PRGIOPND OPERAND (370/XA ONLY) 00000016 PRGITRAC X'16' PRGITRAC TRACE TABLE FULL (370/XA ONLY) 00000017 PRGIASNT X'17' PRGIASNT ASN TRANSLATION SPECIFICATION EXCEPTION 0000001A PRGIBVOL x'1A' PRGIBVOL Block-Volatility exception 0000001C PRGISPSW X'1C' PRGISPSW SPACE SWITCH EVENT 0000001E PRGIUNOP X'1E' PRGIUNOP UNNORMALIZED OPERAND EXCEPTION 0000001F PRGIPCTR X'1F' PRGIPCTR PC-TRANSLATION SPECIFICATION 00000020 PRGIAFXT X'20' PRGIAFXT AFX TRANSLATION 00000021 PRGIASXT X'21' PRGIASXT ASX TRANSLATION 00000022 PRGILXTR X'22' PRGILXTR LX TRANSLATION 00000023 PRGIEXTR X'23' PRGIEXTR EX TRANSLATION 00000024 PRGIPRIA X'24' PRGIPRIA PRIMARY AUTHORITY 00000025 PRGISECA X'25' PRGISECA SECONDARY AUTHORITY 00000026 PRGILFXTS X'26' PRGILFXTS LFX translation specification 00000027 PRGILSXTS X'27' PRGILSXTS LSX translation specification 00000028 PRGIALTS X'28' PRGIALTS ALET SPECIFICATION 00000029 PRGIALNT X'29' PRGIALNT ALEN TRANSLATION 0000002A PRGIALES X'2A' PRGIALES ALE SEQUENCE 0000002B PRGIASTV X'2B' PRGIASTV ASTE VALIDITY 0000002C PRGIASTS X'2C' PRGIASTS ASTE SEQUENCE 0000002D PRGIEXTA X'2D' PRGIEXTA EXTENDED AUTHORITY 0000002E PRGILSTES X'2E' PRGILSTES LSTE Sequence 0000002F PRGIASTI X'2F' PRGIASTI ASTE Instance number 00000030 PRGISTKF X'30' PRGISTKF STACK FULL 00000031 PRGISTKE X'31' PRGISTKE STACK EMPTY 00000032 PRGISTKS X'32' PRGISTKS STACK SPECIFICATION 00000033 PRGISTKT X'33' PRGISTKT STACK TYPE 00000034 PRGISTKO X'34' PRGISTKO STACK OPERATION 00000035 PRGIHIX1 X'35' PRGIHIX1 Host-indicated exception, #1 00000036 PRGIHIX2 X'36' PRGIHIX2 Host-indicated exception, #2 00000038 PRGIASCT X'38' PRGIASCT ASCE type 00000039 PRGIRFT X'39' PRGIRFT Region first translation 0000003A PRGIRST X'3A' PRGIRST Region second translation 0000003B PRGIRTT X'3B' PRGIRTT Region third translation 00000040 PRGIMC X'40' PRGIMC MONITOR CALL 0000007F PRGICMSK X'7F' PRGICMSK MASK TO ISOLATE PROGRAM CHECK 00000080 PRGIPER X'80' PRGIPER PROGRAM EVENT RECORDING, POSSIBLY WITH ANOTHER EXCEPTION CODE . 00D0 208 Signed 4 SI2ITRAD (0) 390: Translation Exception ID 390 & zArch: Data exception code 00D0 208 Bitstring 1 SI2SSCTL 390: Space-switch event control 1... .... SI2SSON X'80' SI2SSON 390: Space-sw-ctrl bit was on 00D1 209 Bitstring 1 SI2SSCT2 390: When a space-switch event occurs, the space-switch event control bit is saved in the high-order bit of SIxSSCTL, and the remaining bits of SIxSSCTL and SIxSSCT2 are set to zero 00D2 210 Signed 2 SI2OPASN (0) 390: Old PASN - set for space- switch event program interrupt 00D2 210 Bitstring 1 * Reserved for IBM hardware use 00D3 211 Bitstring 1 SI2ADDSP (0) Address space flag indicates where STD/ASCE value come from 00000000 SI2PRSTD 00 SI2PRSTD STD/ASCE is obtained from CR1 00000001 SI2ARSTD 01 SI2ARSTD STD/ASCE is obtained from ART 00000002 SI2SESTD 02 SI2SESTD STD/ASCE is obtained from CR7 00000003 SI2HOSTD 03 SI2HOSTD STD/ASCE is obtained from CR13 00D3 211 Bitstring 1 SI2ITRA3 390: Low byte of TEID (contains suppression-on-protection bits, STD ID) 00D0 208 Signed 4 SI2FPARM (0) Interruption parameter 00D0 208 Bitstring 3 * 00D3 211 Bitstring 1 SI2DXCOD Data-exception code 00D4 212 Signed 2 SI2IMNCL Monitor Class 00D6 214 Signed 2 SI2PERCL (0) PER class code 00D6 214 Bitstring 1 SI2PERCD PER event code identifier 00D7 215 Bitstring 1 SI2PERZF PER interrupt code 1... .... SI2ATM31 X'80' SI2ATM31 ATMID PSW bit 31 .1.. .... SI2ATMID X'40' SI2ATMID Addressing and translation mode identification (ATMID) validity bit ..1. .... SI2ATM32 X'20' SI2ATM32 ATMID PSW bit 32 ...1 .... SI2ATM05 X'10' SI2ATM05 ATMID PSW bit 05 .... 1... SI2ATM16 X'08' SI2ATM16 ATMID PSW bit 16 .... .1.. SI2ATM17 X'04' SI2ATM17 ATMID PSW bit 17 .... ..1. SI2PSTD1 X'02' SI2PSTD1 STD ID bit 1 .... ...1 SI2PSTD2 X'01' SI2PSTD2 STD ID bit 2 1111 1111 SI2ATM SI2ATM31+SI2ATMID+SI2ATM32+SI2ATM 05+SI2ATM16+SI2ATM17+SI 2PSTD1+SI2PSTD2 Mask to reset ATM bits .... .... SI2PRSEG X'00' SI2PRSEG STD ID bits both off. This is Primary Segment Table Designation obtained from CR-1 .... ...1 SI2ARSEG X'01' SI2ARSEG STD ID bits = '01'x. This is AR specified .... ..1. SI2SESEG X'02' SI2SESEG STD ID bits = '10'x. This is Secondary Segment Table Designation obtained from CR-7 .... ..11 SI2HOSEG X'03' SI2HOSEG STD ID bits both on. This is Home Segment Table Designation obtained from CR-13 00D8 216 Dbl-Word 8 SI2GPERA (0) zArch: PER Address 00D8 216 Signed 4 SI2GPERL (0) zArch: Left half PER address 00D8 216 Signed 4 SI2PERAD 390: PER Address 00DC 220 Signed 4 SI2GPERR (0) zArch: Right half PER address 00DC 220 Signed 4 SI2IMNCD 390: Monitor code (guest prefix 156-159 (x9C-x9F)) 00E0 224 Bitstring 1 SI2XCPAR Exception Access Identification ..1. .... PRGXCPRI X'20' PRGXCPRI Primary-tran problem (not Access Register related) ...1 .... PRGXCSEC X'10' PRGXCSEC Secondary-tran problem (not Access Register related) .... 1111 PRGXCREG X'0F' PRGXCREG Access-register number Maximum number of real processors .1.. .... MAXRPROC 64 MAXRPROC Maximum number of real processors supported by certain internal data structures ..11 1111 MAXCPUAD 63 MAXCPUAD Maximum CPU address supported Maximum number of users allowed on the system NOTES : PITS 2U06341 is lowering this value from 100,000 to 99,999 because there are many messages in the system which only allow 5 digits for the number of users. See the PITS for all of the details. DO NOT increase MAXUDFLT without re-doing PITS 2U06341. SI2XCPAR MAXUDFLT 99999 MAXUDFLT Default maximum number of logged on users allowed 00E1 225 Bitstring 1 SI2PERAR PER Access Identification 00E2 226 Bitstring 1 SI2OPRID Operand access identification 00E3 227 Bitstring 1 * Reserved for IBM hardware 00E4 228 Signed 4 * Reserved for IBM hardware 00E8 232 Signed 4 SI2XCPAL (0) Exception ALET (corresponds to prefix offset 168-171; used only by VM/ESA during simulation for ESA/XC guests) 000000E8 SI2IOPRM * I/O interruption parameters (redefined below) 00E8 232 Signed 8 SI2GTRAD (0) zArch: Translation exception ID 00E8 232 Signed 4 SI2GTRAH zArch: High word of TEID 00EC 236 Signed 4 SI2GTRAL (0) zArch: Low word of TEID 00EC 236 Bitstring 1 SI2GSSCT zArch: Space-switch event ctrl 1... .... SI2GSSON X'80' SI2GSSON zArch: Space-sw-ctrl bit was on 00ED 237 Bitstring 1 SI2GSSC2 zArch: When a space-sw event occurs, the space-switch event control bit is saved in the high-order bit of SIxGSSCT, and the remaining bits of SIxGSSCT and SIxGSSC2 are set to zero 00EE 238 Signed 2 SI2GOPAS (0) zArch: Old PASN - set for space- switch event program interrupt Codes defined for SI2GTRA6 by HCPEQUAT@VRKNQKU 00EE 238 Bitstring 1 SI2GTRA6 zArch: Byte 6 of TEID Contains Access-Exception Fetch/ Store Indication. 00EF 239 Bitstring 1 SI2GTRA7 zArch: Low byte of TEID (contains suppression-on- protection bits, ASCE ID) Redefine Interruption Parameters area for intercepted I/O interrpution 00E8 232 Signed 4 SI2IOSID (0) I/O interruption subchannel number 00E8 232 Signed 2 SI2IOINT I/O interruption constant 0001 00EA 234 Signed 2 SI2IORNM I/O interruption subchannel number 00EC 236 Signed 4 SI2INPRM I/O interruption parm 00F0 240 Signed 4 SI2HIIDW (0) Host Interruption Identification Word 00F0 240 Bitstring 1 SI2IVISC 00VISC000 00F1 241 Bitstring 1 SI2IZONE ZONE 00F2 242 Bitstring 1 SI2ISCHI I0000000 INTERRUPT INTERLOCK CNTL 1... .... SI2SCHI1 X'80' SI2SCHI1 INTERRUPT INTERLOCK IS ON 00F3 243 Bitstring 1 * RESERVED Redefine Interruption Parameters area for intercepted monitor-event interruption 00E8 232 Signed 8 SI2GMNCD zArch: Monitor code (guest prefix 176-187 (xB0-xB7)) Redefine Interruption Parameters area for Move Page partial-execution interception 00C0 192 Address 8 SI2GDPTE (0) Destination operand host PTE addr 00C0 192 Signed 4 * 00C4 196 Address 4 SI2DPTE Dest host PTE addr, low half 00C8 200 Address 8 SI2GSPTE (0) Source operand host PTE address 00C8 200 Signed 4 * 00CC 204 Address 4 SI2SPTE Source host PTE addr, low half Redefine Interruption Parameters area for QDIO Enhanced Buffer State Management (QEBSM) 00C0 192 Bitstring 3 SI2QPEI (0) Entire EQBSM PEI Code 00C0 192 Bitstring 1 SI2QCODE PEI Reason Code 00C1 193 Bitstring 1 SI2QSBIX Storage Block Index (SBIX) 00C2 194 Bitstring 1 SI2QLCK Lock Indicators 1... .... SI2QSD1 X'80' SI2QSD1 QIOBK/QSD is Locked .1.. .... SI2QSD2 X'40' SI2QSD2 QIOBK/QSD for Format 1, 2 or 3 output queue is locked ..1. .... SI2QSD3 X'20' SI2QSD3 QIOBK/QSD for Format 2 completion queue is locked Redefinition of SIxGCRS for ESA/390 Guest 0100 256 Signed 4 * Unused for ESA/390 guest 0104 260 Signed 4 SI2CR0 (0) ESA/390 guest's CR0 0104 260 Bitstring 1 SI2CR0B0 ESA/390 guest CR0 Byte 0 0105 261 Bitstring 1 SI2CR0B1 ESA/390 guest CR0 Byte 1 0106 262 Bitstring 1 SI2CR0B2 ESA/390 guest CR0 Byte 2 0107 263 Bitstring 1 SI2CR0B3 ESA/390 guest CR0 Byte 2 0108 264 Signed 4 * Unused for ESA/390 guest 010C 268 Signed 4 SI2CR1 (0) ESA/390 guest's CR1 010C 268 Bitstring 1 SI2CR1B0 ESA/390 guest CR1 Byte 0 370 Guest Segment Table Length 1... .... CR1SSXA X'80' CR1SSXA 370/XA SPACE SWITCH EVENT MASK 010D 269 Bitstring 3 SI2CR1SO (0) 370 Guest STO Value 010D 269 Bitstring 1 SI2CR1B1 ESA/390 guest CR1 Byte 1 010E 270 Bitstring 1 SI2CR1B2 ESA/390 guest CR1 Byte 2 010F 271 Bitstring 1 SI2CR1B3 ESA/390 guest CR1 Byte 2 .... ...1 CR1SS370 X'01' CR1SS370 370 SPACE SWITCH EVENT MASK 0110 272 Signed 4 * Unused for ESA/390 guest 0114 276 Signed 4 SI2CR2 (0) ESA/390 guest's CR2 0114 276 Signed 2 SI2CR2IM (0) 370 GUEST CHANNEL MASK 0114 276 Bitstring 1 SI2CR2B0 ESA/390 guest CR2 Byte 0 0115 277 Bitstring 1 SI2CR2B1 ESA/390 guest CR2 Byte 0 0116 278 Bitstring 1 SI2CR2B2 ESA/390 guest CR2 Byte 0 0117 279 Bitstring 1 SI2CR2B3 ESA/390 guest CR2 Byte 0 0118 280 Signed 4 * Unused for ESA/390 guest 011C 284 Signed 4 SI2CR3 (0) ESA/390 guest's CR3 011C 284 Signed 2 SI2CR3KM (0) PSW-KEY mask 011C 284 Bitstring 1 SI2CR3B0 ESA/390 guest CR3 Byte 0 011D 285 Bitstring 1 SI2CR3B1 ESA/390 guest CR3 Byte 1 011E 286 Signed 2 SI2CR3SA (0) Secondary ASN 011E 286 Bitstring 1 SI2CR3B2 ESA/390 guest CR3 Byte 2 011F 287 Bitstring 1 SI2CR3B3 ESA/390 guest CR3 Byte 3 0120 288 Signed 4 * Unused for ESA/390 guest 0124 292 Signed 4 SI2CR4 (0) ESA/390 guest's CR4 0124 292 Signed 2 SI2CR4AX (0) Guest control register 4 - HWORD 0 extended authorization index (AX) 0124 292 Bitstring 1 SI2CR4B0 ESA/390 guest CR4 Byte 0 0125 293 Bitstring 1 SI2CR4B1 ESA/390 guest CR4 Byte 1 0126 294 Signed 2 SI2CR4PA (0) Guest control register 4 - HWORD 1 Primary address space number (PASN) 0126 294 Bitstring 1 SI2CR4B2 ESA/390 guest CR4 Byte 2 0127 295 Bitstring 1 SI2CR4B3 ESA/390 guest CR4 Byte 3 0128 296 Signed 4 * Unused for ESA/390 guest 012C 300 Signed 4 SI2CR5 (0) ESA/390 guest's CR5 012C 300 Bitstring 1 SI2CR5B0 ESA/390 guest CR5 Byte 0 012D 301 Bitstring 1 SI2CR5B1 ESA/390 guest CR5 Byte 1 012E 302 Bitstring 1 SI2CR5B2 ESA/390 guest CR5 Byte 2 012F 303 Bitstring 1 SI2CR5B3 ESA/390 guest CR5 Byte 3 0130 304 Signed 4 * Unused for ESA/390 guest 0134 308 Signed 4 SI2CR6 (0) ESA/390 guest's CR6 0134 308 Bitstring 1 SI2CR6B0 ESA/390 guest CR6 Byte 0 0135 309 Bitstring 1 SI2CR6B1 ESA/390 guest CR6 Byte 1 0136 310 Bitstring 1 SI2CR6B2 ESA/390 guest CR6 Byte 2 0137 311 Bitstring 1 SI2CR6B3 ESA/390 guest CR6 Byte 3 0138 312 Signed 4 * Unused for ESA/390 guest 013C 316 Signed 4 SI2CR7 (0) ESA/390 guest's CR7 013C 316 Bitstring 1 SI2CR7B0 ESA/390 guest CR7 Byte 0 013D 317 Bitstring 1 SI2CR7B1 ESA/390 guest CR7 Byte 1 013E 318 Bitstring 1 SI2CR7B2 ESA/390 guest CR7 Byte 2 013F 319 Bitstring 1 SI2CR7B3 ESA/390 guest CR7 Byte 3 0140 320 Signed 4 * Unused for ESA/390 guest 0144 324 Signed 4 SI2CR8 (0) ESA/390 guest's CR8 0144 324 Signed 2 SI2CR8AX (0) Extended authorization index 0144 324 Bitstring 1 SI2CR8B0 ESA/390 guest CR8 Byte 0 0145 325 Bitstring 1 SI2CR8B1 ESA/390 guest CR8 Byte 1 0146 326 Signed 2 SI2CR8MM (0) MONITOR CALL EVENT MASK 0146 326 Bitstring 1 SI2CR8B2 ESA/390 guest CR8 Byte 2 0147 327 Bitstring 1 SI2CR8B3 ESA/390 guest CR8 Byte 3 ..1. .... SI2MCL10 X'20' SI2MCL10 Monitor call class for data from guest to CP 0148 328 Signed 4 * Unused for ESA/390 guest 014C 332 Signed 4 SI2CR9 (0) ESA/390 guest's CR9 014C 332 Bitstring 1 SI2CR9B0 ESA/390 guest CR9 Byte 0 014D 333 Bitstring 1 SI2CR9B1 ESA/390 guest CR9 Byte 1 014E 334 Bitstring 2 SI2CR9GM PER General-register alteration mask 0150 336 Signed 4 * Unused for ESA/390 guest 0154 340 Signed 4 SI2CR10 ESA/390 guest's CR10 0158 344 Signed 4 * Unused for ESA/390 guest 015C 348 Signed 4 SI2CR11 ESA/390 guest's CR11 0160 352 Signed 4 * Unused for ESA/390 guest 0164 356 Signed 4 SI2CR12 (0) ESA/390 guest's CR12 0164 356 Bitstring 1 SI2CRCB0 ESA/390 guest CR12 Byte 0 1... .... CRCBRCTL X'80' CRCBRCTL BRANCH TRACE CONTROL BIT. WHEN ON, BALR, BASR, BASSM, BAKR AND BSG INST MAY BE TRACED BY THE HARDWARE. Note that for zArch, this bit is moved to GCRC0.0 of a 64-bit CRC with a label of CRCBTCTL. 0165 357 Bitstring 1 SI2CRCB1 ESA/390 guest CR12 Byte 1 0166 358 Bitstring 1 SI2CRCB2 ESA/390 guest CR12 Byte 2 0167 359 Bitstring 1 SI2CRCB3 ESA/390 guest CR12 Byte 3 0168 360 Signed 4 * Unused for ESA/390 guest 016C 364 Signed 4 SI2CR13 (0) ESA/390 guest's CR13 016C 364 Bitstring 1 SI2CRDB0 ESA/390 guest CR13 Byte 0 016D 365 Bitstring 1 SI2CRDB1 ESA/390 guest CR13 Byte 1 016E 366 Bitstring 1 SI2CRDB2 ESA/390 guest CR13 Byte 2 016F 367 Bitstring 1 SI2CRDB3 ESA/390 guest CR13 Byte 3 0170 368 Signed 4 * Unused for ESA/390 guest 0174 372 Signed 4 SI2CR14 (0) ESA/390 guest's CR14 0174 372 Bitstring 1 SI2CREB0 ESA/390 guest CR14 Byte 0 0175 373 Bitstring 1 SI2CREB1 ESA/390 guest CR14 Byte 1 0176 374 Bitstring 1 SI2CREB2 ESA/390 guest CR14 Byte 2 0177 375 Bitstring 1 SI2CREB3 ESA/390 guest CR14 Byte 3 0178 376 Signed 4 * Unused for ESA/390 guest 017C 380 Signed 4 SI2CR15 (0) ESA/390 guest's CR15 MACHINE CHECK EXTENDED LOG ADDR 017C 380 Bitstring 1 SI2CRFB0 ESA/390 guest CR15 Byte 0 017D 381 Bitstring 1 SI2CRFB1 ESA/390 guest CR15 Byte 1 017E 382 Bitstring 1 SI2CRFB2 ESA/390 guest CR15 Byte 2 017F 383 Bitstring 1 SI2CRFB3 ESA/390 guest CR15 Byte 3 End of Control Register redefinitions End of the SIxBK
 
 
  SI2BK Storage Layout Top of page
 
          
*** SI2BK - SIE STATE DESCRIPTOR BLOCK (format 2)
*
*     +------+------+------+------+---------------------------+
*   0 |:NTVCT|:STATC|:MODEX|:MODE |         SI2PREFX          |
*     +------+------+------+------+---------------------------+
*   8 |///////////////////////////|///////////////////////////|
*     +---------------------------+---------------------------+
*  10 |///////////////////////////////////////////////////////|
*     +-------------------------------------------------------+
*  18 |///////////////////////////////////////////////////////|
*     +-------------------------------------------------------+
*  20 |///////////////////////////////////////////////////////|
*     +-------------------------------------------------------+
*  28 |                       SI2CPUTM                        |
*     +-------------------------------------------------------+
*  30 |                        SI2CKC                         |
*     +-------------------------------------------------------+
*  38 |                       SI2EPOCH                        |
*     +------+------+------+------+------+------+-------------+
*  40 |:SVCTL|:SVC1N|:SVC2N|:SVC3N|:LCTB0|:LCTB1|  SI2ICPUA   |
*     +------+------+------+------+------+------+------+------+
*  48 |:ICPT0|:ICPT1|:ICPT2|:ICPT3|:ECA0 |:ECA1 |:ECA2 |:ECA3 |
*     +------+------+------+------+------+------+------+------+
*  50 |:ICODE|:ICFLG|  SI2IHCPU   |/////////////|:INSTO|:INSTE|
*     +------+------+------+------+-------------+------+------+
*  58 |:IPB0 |:IPB1 |:IPB2 |:IPB3 |         SI2IBM3           |
*     +------+------+------+------+---------------------------+
*  60 |:RCPB0|:ECBB0|:RCPB2|:ECBB2|         SI2ISCAA          |
*     +------+------+------+------+-------------+-------------+
*  68 |         SI2RSVD2          |/////////////|  SI2TODPF   |
*     +---------------------------+------+------+------+------+
*  70 |         SI2GISA           |SI2AZN|//////|:DVST |:SCST |
*     +------+-------------+------+------+------+------+------+
*  78 |SI2AZM|  SI2IBM2    |//////|///////////////////////////|
*     +------+-------------+------+---------------------------+
*  80 |                       SI2GMSOR                        |
*     +-------------------------------------------------------+
*  88 |                       SI2GMSLM                        |
*     +------+------+------+------+------+--------------------+
*  90 |:PSW0 |:PSW1 |:PSW2 |:PSW3 |:PSW4 |     SI2PSW57       |
*     +------+------+------+------+------+--------------------+
*  98 |                       SI2PSWIA                        |
*     +-------------------------------------------------------+
*  A0 |                       SI2GG14                         |
*     +-------------------------------------------------------+
*  A8 |                       SI2GG15                         |
*     +-------------------------------------------------------+
*  B0 |///////////////////////////////////////////////////////|
*     +-------------+--------------------+--------------------+
*  B8 |/////////////|      SI2XSO        |      SI2XSL        |
*     +-------------+--------------------+--------------------+
*  C0 |                                                       |
*     =                       SI2UZP0                         =
*     |                           +---------------------------+
*     |                           |         SI2IBM1-          |
*     +-------------+-------------+---------------------------+
*  F8 |   -(0F4)    |   SI2IEF    |         SI2IBM4           |
*     +------+------+------+------+------+------+------+------+
* 100 |:GCR00|:GCR01|:GCR02|:GCR03|:GCR04|:GCR05|:GCR06|:GCR07|
*     +------+------+------+------+------+------+------+------+
* 108 |////////////////////////////////////////////////|:GCR17|
*     +------------------------------------------------+------+
* 110 |                       SI2GCR2                         |
*     +-------------------------------------------------------+
* 118 |                       SI2GCR3                         |
*     +-------------------------------------------------------+
* 120 |                       SI2GCR4                         |
*     +---------------------------+------+--------------------+
* 128 |///////////////////////////|:GCR54|////////////////////|
*     +---------------------------+------+--------------------+
* 130 |///////////////////////////|:GCR64|////////////////////|
*     +---------------------------+------+--------------------+
* 138 |                       SI2GCR7                         |
*     +------+------+------+------+-------------+-------------+
* 140 |:GCR80|:GCR81|:GCR82|:GCR83|  SI2GCR8A   |  SI2GCR8M   |
*     +------+------+------+------+------+------+-------------+
* 148 |///////////////////////////|:GCR94|:GCR95|/////////////|
*     +---------------------------+------+------+-------------+
* 150 |                       SI2GCR10                        |
*     +-------------------------------------------------------+
* 158 |                       SI2GCR11                        |
*     +------------------------------------------------+------+
* 160 |////////////////////////////////////////////////|:GCRC7|
*     +------------------------------------------------+------+
* 168 |////////////////////////////////////////////////|:GCRD7|
*     +---------------------------+------+------+------+------+
* 170 |///////////////////////////|:GCRE4|:GCRE5|/////////////|
*     +---------------------------+------+------+-------------+
* 178 |                       SI2GCR15                        |
*     +-------------------------------------------------------+
* 180 |                       SI2BEAR                         |
*     +-------------------------------------------------------+
* 188 |///////////////////////////////////////////////////////|
*     =///////////////////////////////////////////////////////=
*     |///////////////////////////////////////////////////////|
*     +---------------------------+---------------------------+
* 1A0 |          SI2FLD           |///////////////////////////|
*     +---------------------------+///////////////////////////|
* 1A8 |///////////////////////////////////////////////////////|
*     =///////////////////////////////////////////////////////=
*     |///////////////////////////////////////////////////////|
*     +-------------------------------------------------------+
* 200
*
*** SI2BK - SIE STATE DESCRIPTOR BLOCK (format 2)
          
*** Overlay for SI2IPARM in SI2BK
*
*                                               +------+------+
*  50 ...                                    56 |:VIWHO|:VIWHN|
*     +-------------+-------------+-------------+------+------+
*  58 |  SI2VIWHY   |  SI2VIRSV   | 5C
*     +-------------+-------------+
*
*** Overlay for SI2IPARM in SI2BK
          
*** Overlay for SI2UZP0 in SI2BK
*
*     +---------------------------+-------------+------+------+
*  C0 |         SI2EXMSF          |  SI2IEXCA   |:IEXCL|:IEXCT|
*     +-------------+-------------+-------------+------+------+
*  C8 |  SI2SVCIL   |  SI2SVCNT   |  SI2IPRCL   |:IPRC0|:IPRC1|
*     +------+------+------+------+-------------+------+------+
*  D0 |:SSCTL|:SSCT2|//////|:ITRA3| D4
*     +------+------+------+------+
*
*** Overlay for SI2UZP0 in SI2BK
          
*** Overlay for SI2ITRAD in SI2BK
*
*     +--------------------+------+-------------+------+------+
*  D0 |////////////////////|:DXCOD|  SI2IMNCL   |:PERCD|:PERZF|
*     +--------------------+------+-------------+------+------+
*  D8 |         SI2PERAD          |         SI2IMNCD          |
*     +------+------+------+------+---------------------------+
*  E0 |:XCPAR|:PERAR|:OPRID|//////|///////////////////////////|
*     +------+------+------+------+------+------+------+------+
*  E8 |         SI2GTRAH          |:GSSCT|:GSSC2|:GTRA6|:GTRA7|
*     +---------------------------+------+------+------+------+
*  F0
*
*** Overlay for SI2ITRAD in SI2BK
          
*** Overlay for SI2IOPRM in SI2BK
*
*     +-------------+-------------+---------------------------+
*  E8 |  SI2IOINT   |  SI2IORNM   |         SI2INPRM          |
*     +------+------+------+------+---------------------------+
*  F0 |:IVISC|:IZONE|:ISCHI|//////| F4
*     +------+------+------+------+
*
*** Overlay for SI2IOPRM in SI2BK
          
*** Overlay for SI2IOPRM in SI2BK
*
*     +-------------------------------------------------------+
*  E8 |                       SI2GMNCD                        |
*     +-------------------------------------------------------+
*  F0
*
*** Overlay for SI2IOPRM in SI2BK
          
*** Overlay for SI2UZP0 in SI2BK
*
*     +---------------------------+---------------------------+
*  C0 |///////////////////////////|         SI2DPTE           |
*     +---------------------------+---------------------------+
*  C8 |///////////////////////////|         SI2SPTE           |
*     +---------------------------+---------------------------+
*  D0
*
*** Overlay for SI2UZP0 in SI2BK
          
*** Overlay for SI2UZP0 in SI2BK
*
*     +------+------+------+
*  C0 |:QCODE|:QSBIX|:QLCK | C3
*     +------+------+------+
*
*** Overlay for SI2UZP0 in SI2BK
          
*** Overlay for SI2GCRS in SI2BK
*
*     +---------------------------+------+------+------+------+
* 100 |///////////////////////////|:CR0B0|:CR0B1|:CR0B2|:CR0B3|
*     +---------------------------+------+------+------+------+
* 108 |///////////////////////////|:CR1B0|:CR1B1|:CR1B2|:CR1B3|
*     +---------------------------+------+------+------+------+
* 110 |///////////////////////////|:CR2B0|:CR2B1|:CR2B2|:CR2B3|
*     +---------------------------+------+------+------+------+
* 118 |///////////////////////////|:CR3B0|:CR3B1|:CR3B2|:CR3B3|
*     +---------------------------+------+------+------+------+
* 120 |///////////////////////////|:CR4B0|:CR4B1|:CR4B2|:CR4B3|
*     +---------------------------+------+------+------+------+
* 128 |///////////////////////////|:CR5B0|:CR5B1|:CR5B2|:CR5B3|
*     +---------------------------+------+------+------+------+
* 130 |///////////////////////////|:CR6B0|:CR6B1|:CR6B2|:CR6B3|
*     +---------------------------+------+------+------+------+
* 138 |///////////////////////////|:CR7B0|:CR7B1|:CR7B2|:CR7B3|
*     +---------------------------+------+------+------+------+
* 140 |///////////////////////////|:CR8B0|:CR8B1|:CR8B2|:CR8B3|
*     +---------------------------+------+------+------+------+
* 148 |///////////////////////////|:CR9B0|:CR9B1|  SI2CR9GM   |
*     +---------------------------+------+------+-------------+
* 150 |///////////////////////////|         SI2CR10           |
*     +---------------------------+---------------------------+
* 158 |///////////////////////////|         SI2CR11           |
*     +---------------------------+------+------+------+------+
* 160 |///////////////////////////|:CRCB0|:CRCB1|:CRCB2|:CRCB3|
*     +---------------------------+------+------+------+------+
* 168 |///////////////////////////|:CRDB0|:CRDB1|:CRDB2|:CRDB3|
*     +---------------------------+------+------+------+------+
* 170 |///////////////////////////|:CREB0|:CREB1|:CREB2|:CREB3|
*     +---------------------------+------+------+------+------+
* 178 |///////////////////////////|:CRFB0|:CRFB1|:CRFB2|:CRFB3|
*     +---------------------------+------+------+------+------+
* 180
*
*** Overlay for SI2GCRS in SI2BK
 
 
  SI2BK Cross Reference Top of page
 
 
Symbol         Dspl Value
-------------- ---- -----
ALDMAX         0094 SI2PSW4B
ALDMIN         0094 80
ALD0ALLM       0094 7F
ALD0ALNS       0094 03
ALD0ALOM       0094 SI2PSW4B
ALD0ALUN       0094 80
ALD0ALUS       0094 07
ASWASTEOM      0094 SI2PSW4B
CRCBRCTL       0164 80
CR1SSXA        010C 80
CR1SS370       010F 01
CSWATTN        0076 80
CSWBUSY        0076 10
CSWCBS         0076 70
CSWCCC         0077 04
CSWCDC         0077 08
CSWCDEUC       0076 0E
CSWCE          0076 08
CSWCEDC        0076 2C
CSWCEDE        0076 0C
CSWCHC         0077 01
CSWCUE         0076 20
CSWDE          0076 04
CSWDEA         0076 84
CSWHCE         0077 0E
CSWIFCC        0077 02
CSWIL          0077 40
CSWPCE         0077 31
CSWPCI         0077 80
CSWPRG         0077 20
CSWPROT        0077 10
CSWSM          0076 40
CSWSMBSY       0076 50
CSWUC          0076 02
CSWUE          0076 01
DATBXM         0094 SI2PSW4B
DATPXM         0094 SI2PSW4B
DATSXM         0094 SI2PSW4B
DUWDUCTOM      0094 SI2PSW4B
EXTICALL       00C7 00000002
EXTICKC        00C7 00000004
EXTICL00       00C6 00000000
EXTICL10       00C6 00000010
EXTICL12       00C6 00000012
EXTICL14       00C6 00000014
EXTICL20       00C6 00000020
EXTICL24       00C6 00000024
EXTICL26       00C6 00000026
EXTICL40       00C6 00000040
EXTICPU        00C7 00000005
EXTIEMGS       00C7 00000001
EXTIETR        00C7 00000006
EXTIIUCV       00C7 00000000
EXTIKEY        00C7 00000040
EXTIMALF       00C7 00000000
EXTIMEAS       00C7 00000007
EXTIPVM        00C7 00000002
EXTISVSG       00C7 00000001
EXTITMR        00C7 00000080
EXTITZCH       00C7 00000004
EXTIVMCF       00C7 00000001
EXTIXC         00C7 00000003
IDTECBA        0094 SI2PSW4B
KEYACC         0094 F0
KEYACCF        0094 F8
KEYCHG         0094 02
KEYFETCH       0094 08
KEYISOL        0094 FE
KEYOPEN        0094 09
KEYRC          0094 06
KEYREF         0094 04
MAXCPUAD       00E0 3F
MAXRPROC       00E0 40
MAXUDFLT       00E0 SI2XCPAR
PRGIADCP       00CE 00000136
PRGIADDR       00CF 00000005
PRGIAFXT       00CF 00000020
PRGIALES       00CF 0000002A
PRGIALNT       00CF 00000029
PRGIALTS       00CF 00000028
PRGIARPC       00CE 00008000
PRGIASCT       00CF 00000038
PRGIASNT       00CF 00000017
PRGIASTI       00CF 0000002F
PRGIASTS       00CF 0000002C
PRGIASTV       00CF 0000002B
PRGIASXT       00CF 00000021
PRGIBVOL       00CF 0000001A
PRGICCLR       00CF 00000000
PRGICMSK       00CF 0000007F
PRGIDATA       00CF 00000007
PRGIDDIV       00CF 0000000B
PRGIDECO       00CF 0000000A
PRGIEXEC       00CF 00000003
PRGIEXPO       00CF 0000000C
PRGIEXPU       00CF 0000000D
PRGIEXTA       00CF 0000002D
PRGIEXTR       00CF 00000023
PRGIFDIV       00CF 00000009
PRGIFPDV       00CF 0000000F
PRGIFXDV       00CF 00000008
PRGIHIX1       00CF 00000035
PRGIHIX2       00CF 00000036
PRGILFXTS      00CF 00000026
PRGILSTES      00CF 0000002E
PRGILSXTS      00CF 00000027
PRGILXTR       00CF 00000022
PRGIMC         00CF 00000040
PRGIOPER       00CF 00000001
PRGIOPND       00CF 00000015
PRGIPAGE       00CF 00000011
PRGIPCTR       00CF 0000001F
PRGIPER        00CF 00000080
PRGIPPF        00CF 00000014
PRGIPRIA       00CF 00000024
PRGIPRIV       00CF 00000002
PRGIPROT       00CF 00000004
PRGIRFT        00CF 00000039
PRGIRST        00CF 0000003A
PRGIRTT        00CF 0000003B
PRGISECA       00CF 00000025
PRGISEG        00CF 00000010
PRGISGNF       00CF 0000000E
PRGISPEC       00CF 00000006
PRGISPOP       00CF 00000013
PRGISPSW       00CF 0000001C
PRGISTKE       00CF 00000031
PRGISTKF       00CF 00000030
PRGISTKO       00CF 00000034
PRGISTKS       00CF 00000032
PRGISTKT       00CF 00000033
PRGITRAC       00CF 00000016
PRGITSPC       00CF 00000012
PRGIUNOP       00CF 0000001E
PRGXCPRI       00E0 20
PRGXCREG       00E0 0F
PRGXCSEC       00E0 10
PSWAMODE       0092 40
PSWASMSK       0092 C0
PSWBA          0094 80
PSWCONB1       0094 10
PSWCONB2       0094 20
PSWCOND        0092 30
PSWCONDB       0094 30
PSWCOND1       0092 10
PSWCOND2       0092 20
PSWDECO        0092 04
PSWDECOB       0094 04
PSWEA          0093 01
PSWECMD        0091 08
PSWEXSM        0090 01
PSWEXSMB       0090 01
PSWEXUN        0092 02
PSWEXUNB       0094 02
PSWFIXO        0092 08
PSWFIXOB       0094 08
PSWHIADR       0094 7F
PSWHMODE       0092 C0
PSWILCBC       0094 C0
PSWILCB2       0094 40
PSWILCB4       0094 80
PSWIOMSK       0090 FC
PSWIOSM        0090 02
PSWIOSMB       0090 02
PSWKEY         0091 F0
PSWMAPPD       0091 01
PSWMCHK        0091 04
PSWPERA        0090 40
PSWPMODE       0092 00
PSWPMSK        0092 0F
PSWPMSKB       0094 0F
PSWPROB        0091 01
PSWSIGN        0092 01
PSWSIGNB       0094 01
PSWSMODE       0092 80
PSWTRAN        0090 04
PSWWAIT        0091 02
PSW31AMF       0094 00
PSW31BT        0094 80
PTE2PGM        0094 SI2PSW4B
PTE2PTO        0094 SI2PSW4B
PTO2PGM        0094 SI2PSW4B
SACAR          0094 SI2PSW4B
SACHOME        0094 SI2PSW4B
SACPRIM        0094 00
SACSECO        0094 SI2PSW4B
SAM31          0094 1F
SAM64          0094 40
SIGPCPU        0094 0C
SIGPEMER       0094 03
SIGPEXTC       0094 02
SIGPICPU       0094 0B
SIGPIPR        0094 07
SIGPPR         0094 08
SIGPRSTR       0094 06
SIGPSARC       0094 12
SIGPSENS       0094 01
SIGPSPFX       0094 0D
SIGPSRST       0094 15
SIGPSSTS       0094 0E
SIGPSSTT       0094 09
SIGPSTOP       0094 05
SIGPSTRT       0094 04
SIGPSXST       0094 11
SI2ADDSP       00D3
SI2ARSEG       00D7 01
SI2ARSTD       00D3 00000001
SI2ATM         00D7 FF
SI2ATMID       00D7 40
SI2ATM05       00D7 10
SI2ATM16       00D7 08
SI2ATM17       00D7 04
SI2ATM31       00D7 80
SI2ATM32       00D7 20
SI2AZM         0078
SI2AZN         0074
SI2BEAR        0180
SI2BLEN        01A4 00000200
SI2CKC         0030
SI2CPUTM       0028
SI2CPUTN       0028 80
SI2CPUT0       0028
SI2CRCB0       0164
SI2CRCB1       0165
SI2CRCB2       0166
SI2CRCB3       0167
SI2CRDB0       016C
SI2CRDB1       016D
SI2CRDB2       016E
SI2CRDB3       016F
SI2CREB0       0174
SI2CREB1       0175
SI2CREB2       0176
SI2CREB3       0177
SI2CRFB0       017C
SI2CRFB1       017D
SI2CRFB2       017E
SI2CRFB3       017F
SI2CR0         0104
SI2CR0B0       0104
SI2CR0B1       0105
SI2CR0B2       0106
SI2CR0B3       0107
SI2CR1         010C
SI2CR1B0       010C
SI2CR1B1       010D
SI2CR1B2       010E
SI2CR1B3       010F
SI2CR1SO       010D
SI2CR10        0154
SI2CR11        015C
SI2CR12        0164
SI2CR13        016C
SI2CR14        0174
SI2CR15        017C
SI2CR2         0114
SI2CR2B0       0114
SI2CR2B1       0115
SI2CR2B2       0116
SI2CR2B3       0117
SI2CR2IM       0114
SI2CR3         011C
SI2CR3B0       011C
SI2CR3B1       011D
SI2CR3B2       011E
SI2CR3B3       011F
SI2CR3KM       011C
SI2CR3SA       011E
SI2CR4         0124
SI2CR4AX       0124
SI2CR4B0       0124
SI2CR4B1       0125
SI2CR4B2       0126
SI2CR4B3       0127
SI2CR4PA       0126
SI2CR5         012C
SI2CR5B0       012C
SI2CR5B1       012D
SI2CR5B2       012E
SI2CR5B3       012F
SI2CR6         0134
SI2CR6B0       0134
SI2CR6B1       0135
SI2CR6B2       0136
SI2CR6B3       0137
SI2CR7         013C
SI2CR7B0       013C
SI2CR7B1       013D
SI2CR7B2       013E
SI2CR7B3       013F
SI2CR8         0144
SI2CR8AX       0144
SI2CR8B0       0144
SI2CR8B1       0145
SI2CR8B2       0146
SI2CR8B3       0147
SI2CR8MM       0146
SI2CR9         014C
SI2CR9B0       014C
SI2CR9B1       014D
SI2CR9GM       014E
SI2DPTE        00C4
SI2DVSCS       0076
SI2DVST        0076
SI2DWLEN       01A4 00000040
SI2DXCOD       00D3
SI2ECA         004C
SI2ECALT       004C 08
SI2ECA0        004C
SI2ECA1        004D
SI2ECA2        004E
SI2ECA3        004F
SI2ECB         0061
SI2ECBB0       0061
SI2ECBB1       0062
SI2ECBB2       0063
SI2ECB20       0063 08
SI2ECB21       0063 04
SI2ECEXT       004C 80
SI2ECINT       004C 40
SI2ECIO2       004C 04
SI2ECMVP       004C 01
SI2ECSGP       004C 10
SI2ECWAI       004C 20
SI2EMC10       0143 20
SI2ENDOP       0050 00000000
SI2EPOCH       0038
SI2ESAME       0002 08
SI2ESB         00BA
SI2EXMSF       00C0
SI2EXRUN       0001 01
SI2EXTMR       0001 02
SI2FLD         01A0
SI2FPARM       00D0
SI2GCRC7       0167
SI2GCRD7       016F
SI2GCRE4       0174
SI2GCRE5       0175
SI2GCRS        0100
SI2GCR0        0100
SI2GCR00       0100
SI2GCR01       0101
SI2GCR02       0102
SI2GCR03       0103
SI2GCR04       0104
SI2GCR05       0105
SI2GCR06       0106
SI2GCR07       0107
SI2GCR1        0108
SI2GCR10       0150
SI2GCR11       0158
SI2GCR12       0160
SI2GCR13       0168
SI2GCR14       0170
SI2GCR15       0178
SI2GCR17       010F
SI2GCR2        0110
SI2GCR3        0118
SI2GCR4        0120
SI2GCR5        0128
SI2GCR54       012C
SI2GCR6        0130
SI2GCR64       0134
SI2GCR7        0138
SI2GCR8        0140
SI2GCR8A       0144
SI2GCR8E       0142
SI2GCR8M       0146
SI2GCR80       0140
SI2GCR81       0141
SI2GCR82       0142
SI2GCR83       0143
SI2GCR9        0148
SI2GCR94       014C
SI2GCR95       014D
SI2GDPTE       00C0
SI2GG14        00A0
SI2GG145       00A0
SI2GG15        00A8
SI2GISA        0070
SI2GMNCD       00E8
SI2GMSLM       0088
SI2GMSMKH      0088 00FFFFFF
SI2GMSMKL      0088 00F00000
SI2GMSOR       0080
SI2GOPAS       00EE
SI2GPE         0003 01
SI2GPERA       00D8
SI2GPERL       00D8
SI2GPERR       00DC
SI2GPSW        0090
SI2GSPTE       00C8
SI2GSSCT       00EC
SI2GSSC2       00ED
SI2GSSON       00EC 80
SI2GTRAD       00E8
SI2GTRAH       00E8
SI2GTRAL       00EC
SI2GTRA6       00EE
SI2GTRA7       00EF
SI2HIIDW       00F0
SI2HOSEG       00D7 03
SI2HOSTD       00D3 00000003
SI2HWRSV       0180
SI2IBM1        00F4
SI2IBM2        0079
SI2IBM3        005C
SI2IBM4        00FC
SI2ICALT       0050 00000030
SI2ICBAK       004B 04
SI2ICBOT       0050 0000000C
SI2ICBSA       0049 08
SI2ICEX        0051 01
SI2ICEXL       0051 60
SI2ICEXS       0051 40
SI2ICFII       0048 10
SI2ICFLG       0051
SI2ICIF        0051 02
SI2ICION       0050 00000040
SI2ICIOR       0050 0000003C
SI2ICIPT       0048 01
SI2ICISK       004A 40
SI2ICLPS       0049 40
SI2ICLSP       004A 01
SI2ICNTC       0050 00000004
SI2ICODE       0050
SI2ICOUO       0050 0000002C
SI2ICPC        004A 08
SI2ICPEX       0050 00000010
SI2ICPG        004B 02
SI2ICPIO       0050 00000018
SI2ICPIX       0050 00000038
SI2ICPNT       0050 00000008
SI2ICPOP       0048 80
SI2ICPR        004B 08
SI2ICPRG       0048 20
SI2ICPRO       0048 40
SI2ICPT        004A 04
SI2ICPTL       0049 20
SI2ICPT0       0048
SI2ICPT1       0049
SI2ICPT2       004A
SI2ICPT3       004B
SI2ICPUA       0046
SI2ICRRB       004A 10
SI2ICRUN       0050 00000044
SI2ICSCK       004B 20
SI2ICSPT       004B 40
SI2ICSSK       004A 20
SI2ICSSM       0049 10
SI2ICSTC       0049 04
SI2ICSTK       004A 80
SI2ICSTN       0049 02
SI2ICSTO       0049 01
SI2ICSTP       0050 00000028
SI2ICTLS       0048
SI2ICTMR       0050 00000048
SI2ICTPT       004A 02
SI2ICVAL       0050 00000020
SI2ICWT        0050 0000001C
SI2ICXNT       0050 00000014
SI2IEF         00FA
SI2IEXCA       00C4
SI2IEXCD       00C6
SI2IEXCF       00C4
SI2IEXCL       00C6
SI2IEXCT       00C7
SI2IHCPU       0052
SI2IMISC       0050 00000024
SI2IMLT4       0050 00000003
SI2IMNCD       00DC
SI2IMNCL       00D4
SI2INPRM       00EC
SI2INST        0056
SI2INSTE       0057
SI2INSTO       0056
SI2INTWD       0000
SI2IOINT       00E8
SI2IOPCT       0074
SI2IOPRM       00E8 000000E8
SI2IORNM       00EA
SI2IOSID       00E8
SI2IPA         0056
SI2IPARM       0056
SI2IPA0        0056 00000056
SI2IPA1        0057 57
SI2IPB         0058
SI2IPBH0       0058
SI2IPBH1       005A
SI2IPB0        0058
SI2IPB1        0059
SI2IPB2        005A
SI2IPB3        005B
SI2IPEXT       0000 01
SI2IPRCC       00CE
SI2IPRCD       00CC
SI2IPRCL       00CC
SI2IPRC0       00CE
SI2IPRC1       00CF
SI2IPSTP       0000 04
SI2IPVIO       0000 02
SI2IPWAI       0000 10
SI2IPXTC       0000 08
SI2ISCAA       0064
SI2ISCHI       00F2
SI2ITRAD       00D0
SI2ITRA3       00D3
SI2IVISC       00F0
SI2IZONE       00F1
SI2LCTB0       0044
SI2LCTB1       0045
SI2LCTLA       0045 20
SI2LCTLB       0045 10
SI2LCTLC       0045 08
SI2LCTLD       0045 04
SI2LCTLE       0045 02
SI2LCTLF       0045 01
SI2LCTLS       0044
SI2LCTL0       0044 80
SI2LCTL1       0044 40
SI2LCTL2       0044 20
SI2LCTL3       0044 10
SI2LCTL4       0044 08
SI2LCTL5       0044 04
SI2LCTL6       0044 02
SI2LCTL7       0044 01
SI2LCTL8       0045 80
SI2LCTL9       0045 40
SI2MCDS        0002 01
SI2MCL10       0147 20
SI2MODE        0003
SI2MODEX       0002
SI2NTVCT       0000
SI2OPASN       00D2
SI2OPRID       00E2
SI2PERAD       00D8
SI2PERAR       00E1
SI2PERCD       00D6
SI2PERCL       00D6
SI2PERZF       00D7
SI2PREFX       0004
SI2PRSEG       00D7 00
SI2PRSTD       00D3 00000000
SI2PSTD1       00D7 02
SI2PSTD2       00D7 01
SI2PSW         0090
SI2PSWIA       0098
SI2PSW0        0090
SI2PSW0B       0090
SI2PSW0F       0090
SI2PSW1        0091
SI2PSW2        0092
SI2PSW2H       0092
SI2PSW3        0093
SI2PSW4        0094
SI2PSW4B       0094
SI2PSW4F       0094
SI2PSW57       0095
SI2QCODE       00C0
SI2QEBSM       0061 80
SI2QLCK        00C2
SI2QPEI        00C0
SI2QSBIX       00C1
SI2QSD1        00C2 80
SI2QSD2        00C2 40
SI2QSD3        00C2 20
SI2RCPBY       0062 10
SI2RCPB0       0060
SI2RCPB2       0062
SI2RRF         0002 80
SI2RSCB        0001 40
SI2RSVD2       0068
SI2RSVD3       0078
SI2RUNNING     0001 80
SI2SCHI1       00F2 80
SI2SCST        0077
SI2SDSC        0000
SI2SESEG       00D7 02
SI2SESTD       00D3 00000002
SI2SIGA        004F 04
SI2SKAIP       0060 40
SI2SPTE        00CC
SI2SSCTL       00D0
SI2SSCT2       00D1
SI2SSON        00D0 80
SI2STATC       0001
SI2SVCIL       00C8
SI2SVCNN       0040 80
SI2SVCNT       00CA
SI2SVCTL       0040
SI2SVC1C       0040 40
SI2SVC1N       0041
SI2SVC2C       0040 20
SI2SVC2N       0042
SI2SVC3C       0040 10
SI2SVC3N       0043
SI2TODPF       006E
SI2TODPR       006C
SI2UZP0        00C0
SI2VIRSN       0056
SI2VIRSV       005A
SI2VIWHN       0057
SI2VIWHO       0056
SI2VIWHY       0058
SI2VR          0003 08
SI2XCPAL       00E8
SI2XCPAR       00E0
SI2XSL         00BD
SI2XSO         00BA
SI22NDVR       0002 20
SI22NDVV       0002 40
SSKEMB         0094 01
SSKEMC         0094 02
SSKEMR         0094 04
SSKENQ         0094 08
STD2STO        0094 SI2PSW4B
STE2PGM        0094 SI2PSW4B
STE2PTO        0094 SI2PSW4B
STE2STO        0094 SI2PSW4B
 
This information is based on z/VM 6.3.0 Last updated on 22 May 2013 at 13:55:46 EDT.
Copyright IBM Corporation, 1990, 2013