Programming Interface Information: This information is NOT intended to be
used as Programming Interfaces of z/VM.

RTEBK

Prolog  

Control Block Contents  
   RTEBK DSECT

Storage Layout  

Cross Reference (Contains links to field and bit definitions)  


RTEBK Prolog

 Name       : HCPRTEBK
 Description: Region-Table Entry
 DSECT      : RTEBK
 Function   : This DSECT maps an ESAME region-table entry (RTE).
              The RTE defines three types of table entries:
              region-first-table (RFT), region-second-table (RST)
              and region-third-table (RTT).
              An RFT entry contains an RST designation.  An RST
              entry contains an RTT designation.  An RTT entry
              contains a segment-table designation.
              The format of a region-table entry is architected,
              and described in the Principles of Operation.
 Located by : CR1      is the ASCE for the primary address space.
              CR7      is the ASCE for the secondary address space.
              CR13     is the ASCE for the home address space.
              VMDPASCE is the ASCE for the primary address space.
 Created by : HCPASMCR when an address space equal to or greater
              than 2 gigabytes is created.
 Deleted by : HCPASMDS when the address space is destroyed.

 

RTEBK Control Block Content


RTEBK DSECT

Hex   Dec Type/Val   Lng Label (dup)    Comments
---- ---- --------- ---- -------------- --------
0000    0 Structure      RTEBK          Region-Table Entry
     ESAME RTEBK - 8 bytes, 64 bits
0000    0 Dbl-Word     8 RTEENTRY       Entire region-table entry
     64-bit mask X'FFFFFFFFFFFFF000'
          00FFFFFF       RTETOMH        X'FFFFFFFF' Isolate table origin
                                        (high word)
          00FFF000       RTETOML        X'FFFFF000' Isolate table origin
                                        (low word)
     64-bit mask X'00000000000000C0' 32-bit high X'00000000'
          11.. ....      RTETFMSK       X'000000C0' Isolate table offset
                                        bits
     64-bit mask X'0000000000000020' 32-bit high X'00000000'
          ..1. ....      RTEINVMK       X'00000020' Isolate invalid bit
     64-bit mask X'0000000000000010' 32-bit high X'00000000'
          ...1 ....      RTENULMK       X'00000010' Isolate null bit
     64-bit mask X'000000000000000C' 32-bit high X'00000000'
          .... 11..      RTETTMSK       X'0000000C' Isolate table type
                                        bits
     64-bit mask X'0000000000000003' 32-bit high X'00000000'
          .... ..11      RTETLMSK       X'00000003' Isolate table length
                                        of region-second table or
                                        region-third table or segment
                                        table
          00000002       RTETFNUM       2 Number of table-offset bits
          00000002       RTETLNUM       2 Number of table-length bits
          00000006       RTETFSHF       6 Offset of table-offset (TF)
                                        field from right edge of RTE
          00000006       RTETFBYT       6 Bits to shift TF to get number
                                        of bytes from table origin to
                                        actual start of table
          0000000C       RTETLBYT       12 Bits to shift (TL+1) to get
                                        number of bytes from origin to
                                        end of table
          0000000B       RTERXNUM       11 Number of bits in Rx index
          0000000B       RTESXNUM       RTERXNUM Number of bits in
                                        Segment index
          000007FF       RTERXRIT       X'7FF' Mask to select a right-
                                        justified RX
          0000000B       RTERFNUM       RTERXNUM Number of bits in RFX
                                        portion of virtual address
          0000000B       RTERSNUM       RTERXNUM Number of bits in RSX
                                        portion of virtual address
          0000000B       RTERTNUM       RTERXNUM Number of bits in RTX
                                        portion of virtual address
          0000000B       RTESNUM        RTERXNUM Number of bits in SX
                                        portion of virtual address
          0000003E       RTERFXTL       64-RTETLNUM Number of bits to
                                        shift to convert between an
                                        isolated RFX and the
                                        corresponding RFTL. Also the
                                        number of bits to shift to
                                        convert between RFTL units and
                                        addressable bytes.
          00000033       RTERSXTL       64-RTERSNUM-RTETLNUM Number of
                                        bits to shift to convert between
                                        an isolated RSX and the
                                        corresponding RSTL. Also the
                                        number of bits to shift to
                                        convert between RSTL units and
                                        addressable bytes.
          00000028       RTERTXTL       64-RTERFNUM-RTERSNUM-RTETLNUM
                                        Number of bits to shift to
                                        convert between an isolated RTX
                                        and the corresponding RTTL. Also
                                        the number of bits to shift to
                                        convert between RTTL units and
                                        addressable bytes.
          0000001D       RTESXSTL       64-RTERFNUM-RTERSNUM-RTERTNUM-RTE
                                        TLNUM Number of bits to shift to
                                        convert between an isolated SX
                                        and the corresponding STL. Also
                                        the number of bits to shift to
                                        convert between STL units and
                                        addressable bytes.
          0000000B       RTEFCLR        RTERFNUM Number of bits to shift
                                        out RFX portion of virtual
                                        address, i.e. left-align RSX
          00000016       RTEFSCLR       RTERFNUM+RTERSNUM Number of bits
                                        to shift out RFX and RSX portions
                                        of virtual address, i.e.
                                        left-align RTX
          00000035       RTESHIFT       64-RTERXNUM Number of bits to
                                        shift to right-align a
                                        left-aligned Rx index
          00000008       RTELENTH       *-RTEENTRY Length of one RTE
          00000003       RTESZSHF       3 Shift to multiply by size of an
                                        RTE
0008    8 Dbl-Word     8 RTENEXT (0)    Next RTE
0000    0 Signed       4 RTEW0          Word 0 of RTE
0004    4 Signed       4 RTEW1          Word 1 of RTE
0004    4 Bitstring    1 RTEW1B0        Word 1 Byte 0 of RTE
0005    5 Bitstring    1 RTEW1B1        Word 1 Byte 1 of RTE
0006    6 Bitstring    1 RTEW1B2        Word 1 Byte 2 of RTE
0007    7 Bitstring    1 RTEW1B3        Word 1 Byte 3 of RTE
0007    7 Bitstring    1 RTEFLAG        RTE Flag Byte
          .1.. ....      RTETRANS       X'40' RTE is in the process of
                                        being . validated. This bit is a
                                        . non-architected CP software .
                                        definition and is used to .
                                        serialize RTE validation. Note
                                        that TMLL is used to test RTEIBIT
                                        and RTENBIT at the same time.
                                        This creates a dependency on
                                        RETIBIT being to the left of and
                                        in the same halfword as RTENBIT.
                                        Note that TMLL is used to test
                                        RTEIBIT and RTENBIT at the same
                                        time. This creates a dependency
                                        on RETIBIT being to the left of
                                        and in the same halfword as
                                        RTENBIT.
          ..1. ....      RTEIBIT        X'20' RTE is invalid.
          ...1 ....      RTENBIT        X'10' RTE is null and cannot be .
                                        validated. This bit is a .
                                        non-architected CP software .
                                        definition used to identify .
                                        RTEs representing non- .
                                        addressable storage.
          .... 11..      RTETTBTS       X'0C' RTE table type bits
          .... 11..      RTETTF         X'0C' RTE is an RFT entry
          .... 1...      RTETTS         X'08' RTE is an RST entry
          .... .1..      RTETTT         X'04' RTE is an RTT entry

 

RTEBK Storage Layout

          
*** RTEBK - Region-Table Entry
*
*
*** RTEBK - Region-Table Entry
          
*** Overlay for RTEBK in RTEBK
*
*     +-------------------------------------------------------+
*   0 |                       RTEENTRY                        |
*     +-------------------------------------------------------+
*
*** Overlay for RTEBK in RTEBK
          
*** Overlay for RTEENTRY in RTEBK
*
*     +---------------------------+---------------------------+
*   0 |          RTEW0            |          RTEW1            |
*     +---------------------------+---------------------------+
*   8
*
*** Overlay for RTEENTRY in RTEBK
          
*** Overlay for RTEW1 in RTEBK
*
*                                 +------+------+------+------+
*   0 ...                       4 |:W1B0 |:W1B1 |:W1B2 |:W1B3 |
*                                 +------+------+------+------+
*   8
*
*** Overlay for RTEW1 in RTEBK
          
*** Overlay for RTEW1B3 in RTEBK
*
*                                                      +------+
*   0 ...                                            7 |:FLAG |
*                                                      +------+
*   8
*
*** Overlay for RTEW1B3 in RTEBK

 

RTEBK Cross Reference

Symbol         Dspl Value
-------------- ---- -----
RTEENTRY       0000
RTEFCLR        0000 0000000B
RTEFLAG        0007
RTEFSCLR       0000 00000016
RTEIBIT        0007 20
RTEINVMK       0000 20
RTELENTH       0000 00000008
RTENBIT        0007 10
RTENEXT        0008
RTENULMK       0000 10
RTERFNUM       0000 0000000B
RTERFXTL       0000 0000003E
RTERSNUM       0000 0000000B
RTERSXTL       0000 00000033
RTERTNUM       0000 0000000B
RTERTXTL       0000 00000028
RTERXNUM       0000 0000000B
RTERXRIT       0000 000007FF
RTESHIFT       0000 00000035
RTESNUM        0000 0000000B
RTESXNUM       0000 0000000B
RTESXSTL       0000 0000001D
RTESZSHF       0000 00000003
RTETFBYT       0000 00000006
RTETFMSK       0000 C0
RTETFNUM       0000 00000002
RTETFSHF       0000 00000006
RTETLBYT       0000 0000000C
RTETLMSK       0000 03
RTETLNUM       0000 00000002
RTETOMH        0000 00FFFFFF
RTETOML        0000 00FFF000
RTETRANS       0007 40
RTETTBTS       0007 0C
RTETTF         0007 0C
RTETTMSK       0000 0C
RTETTS         0007 08
RTETTT         0007 04
RTEW0          0000
RTEW1          0004
RTEW1B0        0004
RTEW1B1        0005
RTEW1B2        0006
RTEW1B3        0007

This information is based on z/VM V4R1.0.
Last updated on 5 Jun 2001 at 17:19:40 EDT.
Copyright IBM Corporation, 1990, 2001